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The least significant stage of the sum network {bit 16) provides for the injection of a
ONE or a ZERO as a pseudo-carry from a non-existent 17th stage.
This function {E lKl 7
from LBD 127) is used to offset the implicit -1 value which summand H assumes when no
selection of registers M, P, or Y is specified.
The same function also completes the two
1
s
complementing action required in the SUB instruction.
During one algorithm {ERA) the sum network is used for forming the bit-by-bit
exclusive-OR of summand G and summand H,
rather than their algebraic sums.
For
this purpose signal JAMKN is applied to the intermediate function logic, the carry net-
work and the sum formation gates.
The effect of a ground on this line is to suppress all
carries, (i.e., the output of each stage of the sum network is identical to that which would
exist if the carry from the preceding stage was a logical ZERO).
Sum Formation and Strobing
The Boolean expression for the algebraic sum, S = G + H, can be manipulated into
several equivalent forms:
s
=G
H
c
n+ 1
+G
H
c
n+ 1
+G
H
c
n+ 1
+G
H
c
n+ 1
n
n
n
n
n
n
n
n
n
s
=G
H
c
n+ 1
+G
H
.c
1 + G
. H
c
n+ 1
+G
H
c
n
n
n
n
n
n+
n
n
n
n
n+ 1
s
=G
(G
+
H )
c
+ 1 + (G
t H ) (G
+
H )
C + 1
+
(G
+ H)
H
c
n+ 1
( 1)
n
n
n
n
n
n
n
n
n
n
n
n
n
Still another form of this expres::;10n
i::;
produced by noting, in the middle term of equation ( i),
that:
(G
+
H )
C
= (G
+ H ) (G
+ H ) {G
. H
+ C nt
1
)
n
n
n
n
n
n
n
n
n
(G
+
H )
(G
+ H )
c
+ 1
n
n
n
n
n
Hence,
s
=
G
(G
+
H ) E
+
1
+ (G
+
H )
c
t (G
+
H )
H
n
n
n
n
n
n
n
n
n
n
n
(2)
Equation (1) is used in the sum logic (Figure 2-15) of those stages (15, 13, 11, 9, 7,
6, 4, 2) for which the carry from the previous stage is available in true form; equation (2)
is implemented in the other stages.
2-17
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