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TRANSMISSION LINE DRIVER PAC, MODEL CC-153
The Transmission Line Driver PAC, Model CC-153 (Figure A-61), contains six
identical circuits which drive twisted-pair cables at 1-mc repetition rates.
The trans mis -
sion line receivers should be a high impedance.
A standard NAND gate is recommended.
The design principle is such that the PAC can drive up to 20 unit loads in a daisy
chain without terminating resistors.
The turn-on rise time is limited to a minimum of
35 nanoseconds by means of a Miller capacitor.
Positive reflections due to line mismatch
are clamped to ground at the receivers.
The active pull-up on the output is short circuit
protected by means of a series current limiting resistor which also serves as a partial
series line-matching resistor.
CIRCUIT FUNCTION
Each driver circuit which performs a NAND function contains a 2-input F-02
amplifier microcircuit.
Each circuit has a ground pin adjacent to the output terminals
for the signal return from the transmission line.
SPECIFICATIONS
Frequency of Operation
Output Waveform Characteristics
DC to 5 me
Input Loading
Rise time:
30 nsec (typ) positive voltage
transition
1 unit load each
Fall time:
40 nsec (typ) negative voltage
transition
Output Drive Capability
20 unit loads
Current Requirements
+6v: 120 ma (max)
Circuit Delay
60 nsec (typ)
80 nsec (max)
Ref.
Desig.
Ml-M3
Cl
CZ
Ql, 02
Rl
Power Dissipation
O. 8w (max)
Electrical Parts List
Description
MICROCIRCUIT:
F-02 quad NAND gate integrated circuit
CAPACITOR, 'FIXED, PLASTIC DIELECTRIC:
0. 033 µf ± 20%, 50 vdc
CAPACITOR, FIXED, CERAMIC DIELECTRIC:
33 pf ±10%, vdc
TRANSISTOR:
RESISTOR, FIXED, COMPOSITION:
30 ohms ±5%, l/4w
3C Part No.
950 100 002
930 313 016
930 173 209
943 722 002
932 007 012
A-101
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