Figure 5-7 Ml100T-12 Faceplate And Block Diagram; Ml100T-12 Card-Level Indicators - Cisco ONS 15454 Reference Manual

5.8 5.8.1 ML100T-12 Card-Level Indicators

Figure 5-7 ML100T-12 Faceplate and Block Diagram
ML100T
12
ACT
FAIL
4
4xMag.
2
12 x
4xMag.
RJ45
2
4
4xMag.
The card features two virtual packet over SONET (POS) ports with a maximum combined bandwidth of
STS-48. The ports function in a manner similar to OC-N card ports, and each port carries an STS circuit
with a size of STS-1, STS-3c, STS-6c, STS-9c, STS-12c, or STS-24c. To configure an ML-Series card
SONET STS circuit, refer to the "Create Circuits and VT Tunnels" chapter of the
Cisco ONS 15454 Procedure Guide.
The ML-Series POS ports supports virtual concatenation (VCAT) of SONET circuits and a software link
capacity adjustment scheme (SW-LCAS). The ML-Series card supports a maximum of two VCAT
groups with each group corresponding to one of the POS ports. Each VCAT group must be provisioned
with two circuit members. An ML-Series card supports STS-1c-2v, STS-3c-2v and STS-12c-2v. To
configure an ML-Series card SONET VCAT circuit, refer to the "Create Circuits and VT Tunnels"
chapter of the Cisco ONS 15454 Procedure Guide.
5.8.1 ML100T-12 Card-Level Indicators
The ML00T-12 card supports two card-level LED indicators. The card-level indicators are described in
Table
Cisco ONS 15454 Reference Manual, R7.0.1
5-20
Packet
Buffer
6MB
SMII
4
6
Octal
port
PHY
0
2
2
6
port
Octal
4
1
PHY
ch0-1
Control Mem
2MB
Result Mem
5-15.
Packet Packet
Buffer Buffer
6MB 4MB
RGGI RGGI
port port port
1 2 A
DOS
FPGA
port port port
0 3 B
SCL
ch4-5
Control Mem
2MB
Processor
Daughter Card
2MB
128MB SDRAM
16MB FLASH
8KB NVRAM
Chapter 5 Ethernet Cards
BPIA
Main
Rx
BPIA
Protect
Rx
B
a
c
BTC192
k
p
l
a
n
e
BPIA
Main
Tx
BPIA
Protect
Tx
OL-9217-01