Figure 3-2 Instruction Cache Enabled (0, 0, 1) - Motorola DSP56309 User Manual

Program
$FFFFFF
Internal
Reserved
$FFF0C0
Bootstrap ROM
$FF0000
External
$005000
I-Cache
$004C00
Internal
Program RAM
$000000
Bit Settings
SC MS CE
0 0 1
MOTOROLA
$FFFFFF
$FFFF80
$FFF000
$FF0000
1K
$001C00
19K
$000000
Program X Data
RAM RAM
19K 7K
$0000Ð $0000Ð
$4BFF $1BFF

Figure 3-2 Instruction Cache Enabled (0, 0, 1)

DSP56309UM/D
X Data
$FFFFFF
Internal I/O
$FFFF80
External
$FFF000
Internal
Reserved
$FF0000
External
$001C00
Internal
X data RAM
7K
$000000
Memory Configuration
Y Data
RAM
7K
$0000Ð
$1BFF
Memory Configuration
Memory Maps
Y Data
External I/O
External
Internal
Reserved
External
Internal
Y data RAM
7K
Addressable
Cache
Memory Size
1K 16 M
$4C00Ð
$4FFF
AA0561
3-11