External Memory Expansion Port (Port A); External Address Bus; Table 2-6 External Address Bus Signals - Motorola DSP56309 User Manual

24-bit digital signal processor
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Table 2-5 Phase-Locked Loop Signals (Continued)
Signal
Type
Name
PINIT/
Input
NMI
2.6

EXTERNAL MEMORY EXPANSION PORT (PORT A)

When the DSP56309 enters a low-power standby mode (stop or wait), it releases bus
mastership and tri-states the relevant Port A signals: A0ÐA17, D0ÐD23,
AA0/RAS0ÐAA3/RAS3, RD, WR, BB, CAS, BCLK, BCLK.
2.6.1

External Address Bus

External address bus signals for the DSP56309 are listed in Table 2-6.
Signal
Type
Name
A0ÐA17
Output
MOTOROLA
State During
Reset
Input
PLL Initial/Non-Maskable InterruptÑDuring
assertion of RESET, the value of PINIT/NMI is
written into the PLL Enable (PEN) bit of the PLL
control register, determining whether the PLL is
enabled or disabled. After RESET deassertion and
during normal instruction processing, the
PINIT/NMI Schmitt-trigger input is a
negative-edge-triggered Non-Maskable Interrupt
(NMI) request internally synchronized to
CLKOUT.

Table 2-6 External Address Bus Signals

State
During
Reset
Tri-stated
Address BusÑWhen the DSP is the bus master,
A0ÐA17 are active-high outputs that specify the
address for external program and data memory
accesses. Otherwise, the signals are tri-stated.
To minimize power dissipation, A0ÐA17 do not
change state when external memory spaces are
not being accessed.
DSP56309UM/D
Signal/Connection Descriptions

External Memory Expansion Port (Port A)

Signal Description
Signal Description
2-9

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