Motorola DSP56309 User Manual page 411

D
bits 0Ð7ÑPrescale Modulus Select bits
(PM0ÐPM7) 7-11
bits 8Ð10Ñreserved bits 7-11
bit 11ÑPrescaler Range bit (PSR) 7-11
bits 12Ð16ÑFrame Rate Divider Control bits
(DC4ÐDC0) 7-12
bit 17Ñreserved bit 7-13
bit 18ÑAlignment Control bit (ALC) 7-13
bits 19Ð21ÑWord Length Control bits
(WL0ÐWL1) 7-14
bit 22ÑSelect SC1 as Transmitter 0 Drive
Enable bit (SSC1) 7-14
bit 23Ñreserved bit 7-14
reserved bitsÑbit 17 7-13
reserved bitsÑbit 23 7-14
reserved bitsÑbits 8Ð10 7-11
CRB register
bits 0Ð1ÑSerial Output Flag bits
(OF0ÐOF1) 7-15
bit 2ÑSerial Control 0 Direction bit
(SCD0) 7-16
bit 3ÑSerial Control 1 Direction bit
(SCD1) 7-16
bit 4ÑSerial Control 2 Direction bit
(SCD2) 7-16
bit 5ÑClock Source Direction bit (SCKD) 7-16
bit 6ÑShift Direction bit (SHFD) 7-17
bits 7Ð8ÑFrame Sync Length bits
(FSL1ÐFSL0) 7-17
bit 9ÑFrame Sync Relative Timing bit
(FSR) 7-17
bit 10ÑFrame Sync Polarity bit (FSP) 7-17
bit 11ÑClock Polarity bit (CKP) 7-18
bit 12ÑAsynchronous/Synchronous bit
(SYN) 7-18
bit 13ÑESSI Mode Select bit (MOD) 7-20
bit 14ÑESSI Transmit 2 Enable bit (TE2) 7-22
bit 15ÑESSI Transmit 1 Enable bit (TE1) 7-23
bit 16ÑESSI Transmit 0 Enable bit (TE0) 7-24
bit 17ÑESSI Receive Enable bit (RE) 7-26
bit 18ÑESSI Transmit Interrupt Enable bit
(TIE) 7-26
bit 19ÑESSI Receive Interrupt Enable bit
(RIE) 7-26
bit 20ÑESSI Transmit Last Slot Interrupt
Enable bit (TLIE) 7-26
bit 21ÑESSI Receive Last Slot Interrupt Enable
bit (RLIE) 7-27
I-2
bit 22ÑESSI Transmit Exception Interrupt
Enable bit (TEIE) 7-27
bit 23ÑESSI Receive Exception Interrupt
Enable bit (REIE) 7-27
crystal input 2-8
CVR register
bits 0Ð6ÑHost Vector bits (HV0ÐHV6) 6-25
D
D0ÐD23 2-10
data ALU 1-8
registers 1-8
data bus 2-3
signals 2-10
Data Output bit (DO) 9-14
DC4ÐDC0 bits 7-12
DE signal 2-37
Debug Event signal (DE signal) 10-4
Debug mode
in OnCE module 10-16
DEBUG_REQUEST instruction 11-11
executing during Stop state 10-17
executing during Wait state 10-17
executing in OnCE module 10-17
Direct Memory Access (DMA) 1-15
Divide Factor (DF) 1-11
DMA 1-15
triggered by timer 9-27
DO bit 9-14
DO loop 1-10
Double Data Strobe 2-4
Double Host Request bit (HDRQ) 6-23
DRAM 1-13
DS 2-4
DSP56300 core 1-3
DSP56300 Family Manual 1-3
DSP56303 Functional Signal Groupings 2-3
signal groupings 2-3
DSP56303 Technical Data 1-3
E
ENABLE_ONCE instruction 11-11
Enhanced Synchronous Serial Interface
(ESSI) 1-16
Enhanced Synchronous Serial Interface 0 2-24
Enhanced Synchronous Serial Interface 1 2-28
equates
BIU B-13
DSP56309UM/D
,
10-4
,
1-6
,
1-7
, , ,
2-3 2-25 2-28
MOTOROLA