Direct Memory Access (Dma); Dsp56309 Architecture Overview; Gpio Functionality - Motorola DSP56309 User Manual

1.9

DIRECT MEMORY ACCESS (DMA)

The DMA block has the following features:
¥ Six DMA channels supporting internal and external accesses
¥ One-, two-, and three-dimensional transfers (including circular buffering)
¥ End-of-block-transfer interrupts
¥ Triggering from interrupt lines, all peripherals, and DMA channels
1.10

DSP56309 ARCHITECTURE OVERVIEW

The DSP56309 performs a wide variety of fixed-point digital signal processing functions.
In addition to the core features previously discussed, the DSP56309 provides the
following peripherals:
¥ Enhanced DSP56000-like 8-bit parallel host interface (HI08) supports a variety of
buses (e.g., industry standard architecture) and provides glueless connection to a
number of industry standard microcomputers, microprocessors, and DSPs
¥ Two enhanced synchronous serial interfaces (ESSI0 and ESSI1), each with one
receiver and three transmitters (allows six-channel home theater)
¥ Serial communications interface (SCI) with baud rate generator
¥ Triple timer module
¥ Up to 34 programmable general purpose input/output (GPIO) pins, depending
on which peripherals are enabled
1.10.1

GPIO Functionality

The GPIO port consists of as many as thirty-four programmable signals, all of which are
also used by the peripherals (HI08, ESSI, SCI, and timer). There are no dedicated GPIO
signals. Peripheral pins are configured as GPIO inputs after any reset. (Data in the port
data register is not affected by a reset.) The GPIO functionality for each peripheral is
controlled by three memory-mapped registers per peripheral. The techniques for
register programming for all GPIO functionality is very similar between these interfaces.
MOTOROLA DSP56309UM/D
DSP56309 Overview

Direct Memory Access (DMA)

1-15