Internal Buses - Motorola DSP56309 User Manual

¥ External memory expansion port
¥ Simultaneous glueless interface to static random access memory (SRAM) and
dynamic random access memory (DRAM)
¥ Supports interleaved, non-interfering access to both types of memory without
losing in-page DRAM access, including DMA-driven access
1.7

INTERNAL BUSES

The following buses provide data exchange between the functional blocks of the core:
¥ Peripheral I/O expansion bus (PIO_EB) to peripherals
¥ Program memory expansion bus (PM_EB) to Program RAM
¥ X memory expansion bus (XM_EB) to X memory
¥ Y memory expansion bus (YM_EB) to Y memory
¥ Global data bus (GDB) between PCU and other core structures
¥ Program data bus (PDB) for carrying program data throughout the core
¥ X memory data bus (XDB) for carrying X data throughout the core
¥ Y memory data bus (YDB) for carrying Y data throughout the core
¥ Program address bus (PAB) for carrying program memory addresses throughout
the core
¥ X memory address bus (XAB) for carrying X memory addresses throughout the
core
¥ Y memory address bus (YAB) for carrying Y memory addresses throughout the
core
All internal buses on the DSP56300 family members are 16-bit buses except the PDB,
which is a 24-bit bus. Figure 1-1 shows a block diagram of the DSP56309.
MOTOROLA DSP56309UM/D
DSP56309 Overview

Internal Buses

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