Figure 6-6 Host Port Control Register (Hpcr) (X:$Ffffc4) - Motorola DSP56309 User Manual

15 14 13
HAP HRP HCSP HDDS HMUX HASP HDSP HROD
ÑReserved bit, read as 0, should be written with 0 for future compatibility.

Figure 6-6 Host Port Control Register (HPCR) (X:$FFFFC4)

Note: To assure proper operation of the DSP56309, the HPCR bits HAP, HRP, HCSP,
HDDS, HMUX, HASP, HDSP, HROD, HAEN, and HREN should be changed
only if HEN is cleared.
To assure proper operation of the DSP56309, the HPCR bits HAP, HRP, HCSP,
HDDS, HMUX, HASP, HDSP, HROD, HAEN, HREN, HCSEN, HA9EN, and
HA8EN should not be set when HEN is set or simultaneously with setting
HEN.
6.5.6.1 HPCR Host GPIO Port Enable (HGEN) Bit 0
If HGEN is set, signals configured as GPIO are enabled. If this bit is cleared, signals
configured as GPIO are disconnected; outputs are high impedance, and inputs are
electrically disconnected. Signals configured as HI08 are not affected by the value of
HGEN.
6.5.6.2 HPCR Host Address Line 8 Enable (HA8EN) Bit 1
If HA8EN is set and the HI08 is in multiplexed bus mode, then HA8/A1 acts as host
address line 8 (HA8). If this bit is cleared and the HI08 is in multiplexed bus mode, then
HA8/HA1 acts as a GPIO signal according to the value of the HDDR and HDR.
Note: HA8EN is ignored when the HI08 is not in the multiplexed bus mode (HMUX
is cleared).
6.5.6.3 HPCR Host Address Line 9 Enable (HA9EN) Bit 2
If HA9EN is set and the HI08 is in multiplexed bus mode, then HA9/HA2 acts as host
address line 9 (HA9). If this bit is cleared, and the HI08 is in multiplexed bus mode, then
HA9/HA2 is configured as a GPIO signal according to the value of the HDDR and HDR.
HA9EN is ignored when the HI08 is not in the multiplexed bus mode (HMUX
Note:
is cleared).
6.5.6.4 HPCR Host Chip Select Enable (HCSEN) Bit 3
If the HCSEN bit is set, then HCS/HA10 is used as host chip select (HCS) in the
non-multiplexed bus mode (HMUX is cleared), and as host address line 10 (HA10) in the
multiplexed bus mode (HMUX is set). If this bit is cleared, then HCS/HA10 is
configured as a GPIO signal according to the value of the HDDR and HDR.
MOTOROLA
12 11 10 9
DSP56309UM/D
HI08 DSP Side ProgrammerÕs Model
8 7 6 5
HEN HAEN HREN HCSEN HA9EN HA8EN HGEN
Host Interface (HI08)
4 3 2 1 0
AA0660
6-13