Dsp56300 Restrictions - Motorola DSP56309 User Manual

24-bit digital signal processor
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JTAG Port

DSP56300 Restrictions

11.4
DSP56300 RESTRICTIONS
The control afforded by the output enable signals using the BSR and the EXTEST
instruction requires a compatible circuit-board test environment to avoid
device-destructive configurations. You must avoid situations in which the DSP56300
core output drivers are enabled into actively driven networks. In addition, the EXTEST
instruction can be performed only after power-up or a regular hardware RESET signal
while EXTAL was provided. Then during the execution of EXTEST, EXTAL can remain
inactive.
There are two constraints related to the JTAG interface. First, the TCK input does not
include an internal pullup resistor and should not be left unconnected. The second
constraint is to insure that the JTAG test logic is kept transparent to the system logic by
forcing the TAP into the Test-Logic-Reset controller state, using either of two methods.
During power-up, TRST must be externally asserted to force the TAP controller into this
state. After power-up is concluded, TMS must be sampled as a logical 1 for five
consecutive TCK rising edges. If TMS either remains unconnected or is connected to
V
, then the TAP controller cannot leave the Test-Logic-Reset state, regardless of the
CC
state of TCK.
The DSP56300 core features a low-power stop mode, which is invoked using the STOP
instruction. The interaction of the JTAG interface with low-power Stop mode is as
follows:
1. The TAP controller must be in the Test-Logic-Reset state to either enter or remain
in the low-power stop mode. Leaving the TAP controller Test-Logic-Reset state
negates the ability to achieve low-power, but does not otherwise affect device
functionality.
2. The TCK input is not blocked in low-power stop mode. To consume minimal
power, the TCK input should be externally connected to V
3. The TMS and TDI signals include on-chip pullup resistors. In low-power stop
mode, these two signals should remain either unconnected or connected to V
achieve minimal power consumption.
Since during stop mode all DSP56309 core clocks are disabled, the JTAG interface
provides the means of polling the device status (sampled in the Capture-IR state).
11-12
DSP56309UM/D
or GND.
CC
CC
MOTOROLA
to

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