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Table 22.2 Pin Functions (cont)
Pin
No.
Pin Name
31
VDDQ
32
VSSQ
33
D15
34
D0
35
D14
36
D1
37
D13
38
D2
39
VDD
40
VSS
41
D12
42
D3
43
VDDQ
44
VSSQ
45
D11
46
D4
47
D10
48
D5
49
D9
50
D6
%$&./
51
%65(4
%5(4/
52
%6$&.
53
D8
54
D7
55
CKE
56
VDDQ
57
VSSQ
:(8/&$68/
58
DQM5
Rev. 4.0, 04/00, page 726 of 850
I/O
Function
Power
IO VDD (3.3 V)
Power
IO GND (0 V)
I/O
Data
I/O
Data
I/O
Data
I/O
Data
I/O
Data
I/O
Data
Power
Internal VDD
(1.8 V)
Power
Internal GND
(0 V)
I/O
Data
I/O
Data
Power
IO VDD (3.3 V)
Power
IO GND (0 V)
I/O
Data
I/O
Data
I/O
Data
I/O
Data
I/O
Data
I/O
Data
O
Bus
acknowledge/
bus request
I
Bus request/bus
acknowledge
I/O
Data
I/O
Data
O
Clock output
enable
Power
IO VDD (3.3 V)
Power
IO GND (0 V)
O
D47–D40 select
signal
SRAM
DRAM
Reset
:(8
&$68
Memory Interface
SDRAM PCMCIA MPX
CKE
DQM5
A15
A0
A14
A1
A13
A2
A12
A3
A11
A4
A10
A5
A9
A6
A8
A7
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