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NMI
–
4
(Interrupt request)
TMU
(Interrupt request)
RTC
(Interrupt request)
SCI
(Interrupt request)
SCIF
(Interrupt request)
WDT
(Interrupt request)
REF
(Interrupt request)
DMAC
(Interrupt request)
H-UDI
(Interrupt request)
GPIO
TMU:
Timer unit
RTC:
Realtime clock unit
SCI:
Serial communication interface
SCIF: Serial communication interface with FIFO
WDT: Watchdog timer
REF:
Memory refresh controller section of the bus state controller
DMAC: Direct memory access controller
H-UDI: Hitachi user debug interface
GPIO: I/O port
ICR:
Interrupt control register
IPRA–IPRD: Interrupt priority registers A–D*
SR:
Status register
Note: * IPRD is provided only in the SH7750S.
Rev. 4.0, 04/00, page 660 of 850
Input control
4
ICR
Figure 19.1 Block Diagram of INTC
Priority
identifier
IPR
IPRA–IPRD*
Bus interface
Com-
parator
I3 I2 I1 I0
INTC
Interrupt
request
SR
CPU
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