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MRESET/
SCK2
SPTRR
SPTRW: Write to SPTR
SPTRR: Read SPTR
Note: * Signals that set the SCK2 pin function as internal clock output or external clock input according to
the CKE0 and CKE1 bits in SCSCR2.
Rev. 4.0, 04/00, page 592 of 850
Reset
R
Q
SCKIO
SPTRW
Reset
R
Q
SCKDT
C
SPTRW
Figure 16.6 MRESET/SCK2 Pin
D
C
Internal data bus
D
Clock output enable signal
Serial clock output signal
Serial clock input signal
Clock input enable signal
SCIF
*
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