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• One VITA 57.1 FPGA mezzanine card (FMC) high pin count (HPC) connector
• One VITA 57.1 FPGA mezzanine card low pin count (LPC) connector
• USB-to-UART bridge connected to PL, PS, and System Controller
• Inter IC (I2C) interface
• 4x 4 Gb DDR3 SDRAM PS memory
• 1 Gb Quad SPI flash PS memory
• PMBus connectivity to the board's digital power supplies
Block Diagram
The ZCU1285 block diagram is shown in the following figure.
Power In 12 VDC
FPGA Power Source
On-Board Regulation:
VCCINT 0.85V, 60A
VCCBRAM / VCCINT_IO 0.85V, 6A
VCCAUX / VCCAUX_IO 1.8V, 6A
VCCO_HP 1.8V, 6A
VCCO_HD 1.8V, 6A
VCCPINT 0.85V, 12A
VCCPAUX 1.8V, 3A
VCC_PSPLL 1.2V, 3A
VCCO_DDR 1.5V, 6A
VCCO_MIO 1.8V, 6A
VCCINT_AMS 0.85V, 20A
Board Utility Power
On-Board Power Regulation:
UTIL_5V0_ACM 5.0V, 3A
UTIL_5V0 5.0V, 6A
UTIL_3V3 3.3V, 20A
UTIL_2V5 2.5V, 12A
UTIL_1V8 1.8V, 20A
PMBus/I2C
UG1348 (v1.0) July 16, 2019
ZCU1285 Board User Guide
Chapter 1: ZCU1285 Board Features and Operation
Figure 1: Block Diagram
GTR Transceiver
QUAD 505
BullsEye
Connector
VCC12_SW
GTR Power Module
UTIL_5V0
Interface
UTIL_3V3
DDR3 SDRAM (2 GB)
QSPI (1 Gbit)
USB to UART Bridge
System Controller
GTY Transceivers
QUAD 128
QUAD 129
QUAD 130
QUAD 131
GTY Power Module
VCC12_SW
Interface for
UTIL_5V0
Quads 128-131
UTIL_3V3
Select I/O Termination
PS
RF-ADC/RF-DAC
Zynq Ultrascale+ RFSoC
XCZU39DR-FFVF1760
PL
Send Feedback
RF-ADC and RF-DAC
TILE 224
...
TILE 231
BullsEye Connectors
Analog Power Module
UTIL_5V0_A
Interface for
UTIL_3V0_A
RF-ADC/RF-DAC
UTIL_1V8_A
Tiles 224-231
PMBus/I2C
SuperClock-RF2
UTIL_5V0_ACM
Module Interface
UTIL_3V0_A
(HW-CLK-103)
UTIL_1V8_A
FMC2 Interface
VCCO_HP HPC
FMC3 Interface
VCCO_HD LPC
Oscillator
300 MHz LVDS
Push Buttons,
DIP Switches,
and LEDs
UTIL_5V0
SuperClock-2 Module
UTIL_3V0
Interface
UTIL_2V5
(HW-CLK-101)
VCCO_HP
PMBus/I2C
X22890-060719
www.xilinx.com
7
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