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TABLE 3-2. CARD READER SPECIFICATIONS/CHARACTERISTICS
PROGRAMMED OPERATIONS:
READ SPEED:
MEDIUM:
DATA TRANSFER MODE:
DATA RATE:
INPUT AREA:
READING TECHNIQUE
INPUT/OUTPUT HOPPER CAPACITY:
DEVICE PROTECTION:
CARD SPECIFICATION:
PHYSICAL DIMENSIONS:
COLUMN N
Read data from card
300 or 500 cpm (see Table 3-0
Standard SO-51-optional column punched cards
40-or SO-column mark sense cards
(CRU9102j9104
device only)
Software selectable: Binary-cell 12 rows input directly to mem
ory; ASCII-Hardware converts Hollerith to ASCII and inputs
two characters per memory word.
Data timing is electronically resynchronized for each column
containing data (approximately one msec., per column)
Any main memory area
Photoelectric, column-by-column serially
500 cards
Card feed stop and motor shutdown for input hopper empty,
output hopper full; failure to pick a card on three successive
tries, and card jam detection
Standard punched or mark sense cards, 7 3/S in.
X
3 1/2 in.
(18,6 cm
X
15,9 em), 0.00770 in. (0,01956 cm) thick; cards must
be clean and free from excessive curl
13.5 in. (34.2 em) high; 19.5 in. (49,5 em) wide;
15 in. (38,1 cm) deep
Weight - 35 pounds (15,S kg)
Multiple MDCs can be attached to the Level 6
bus, and multiple like adapters and devices can be
attached to any MDC. However, no more than
four peripheral Device-Pacs can be attached to
anyone MDC. Both the MDC91 Oland CRM91 0 I
are plug-in printed circuit boards. The MDC
contains the circuitry necessary to support the
device adapter connections. Circuitry pertinen t to
the card reader is contained in the card reader
adapter. Through its adapter, each attached card
reader presents a DMA (Direct Memory Access)
interface to the Level 6 processor. See Figure 3-5.
Figure 3-3. Binary Mode Format
COLUMN
In ASCII mode, the 12-bits designated by each
N
~CARD
card column are converted to a single eight-bit
byte and transferred to the system memory
two bytes per word; see Figure 3-4. The conver
sion from Hollerith to ASCII is performed by the
HOLLERITH
card reader adapter. Table 3-3 shows a compari
TO
ASCII
CONVERSION
son of the Hollerith and ASCII codes (bit
designations are in ASCII and relate to the bits on
the system memory as shown in Table 3-4).
r-------------~
COLUMN
N+1
INTERCONNECTIONS/SYSTEM
INTERF ACE
The card reader interfaces with the system bus
of the Level 6 processor by means of the MDC
(Multiple Device Controller) and card reader
SYSTEM MEMORY
adapter. The MDC 910 I controller is a firmware
Figure 3-4. ASCII Mode Format
driven microprogrammed peripheral controller.
CARD READER DEVICES
3-3
AT04
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