GE CM6 Hardware Reference Manual page 58

PCI Express Bus
PMC Site
Compact PCI
GE Intelligent Platforms – CM6 Hardware Reference Manual, Fourth Edition
The MPC8641 includes two PCI Express x1/x2/x4/x8 Buses.
The PCI Express controller connects the internal platform to a 2.5-GHz serial
interface. Upon coming out of reset, the PCI Express interface performs link
width negotiation and exchanges flow control credits with its link partner. Once
link auto negotiation is successful, the controller is in operation.
The CM6 uses both PCI Express Buses for connection of the cPCI and PMC
PCI to PCIe bridges. The bus to the PMC bridge is x4 wide and connected to a
PCI PCIe bridge (Pericom Pi7C9X130). The second PCI Express bus is
connected to the cPCI bridge with an x1 PCIe connection Pericom bridge
Pi7C9X110.
The CM6 hosts one single-wide PMC site that includes the following features:
PMC site supports standard IEEE 1386.1 PMC modules. PMC site is located on
a 64-bit 33/66 MHz PCI Bus. The mode of operation is determined by the
M66EN and PCIXCAP signals. The PMC Bus supports +3.3 V VIO but is +5
V tolerant. PMC_Pn4 I/O signals are partial routed to cPCI_J2.
It can host a PMC module with power ratings of 7.5 W or less.
The PCI bus of the PMC is provided by a PCIe/PCI bridge Pericom PI7C9130.
PMC Bridge Vendor ID:
PMC Bridge device ID:
The PMC Bridge has a serial autoload EEPROM which loads at every power-
up standard register setting into the bridge. This serial EERPOM is
programmed at the factory. It is strongly recommended not to access this device
under user software, because irregular content may prevent the board to boot-
up.
The CM6 provides a cPCI compliant 66MHz/32bit PCI bus. The PCI signaling
voltage V(I/O) at the cPCI can be either 3.3 V or 5 V. If the signal voltage is
3.3 V the CM6 can tolerate 5 V signaling.
The CM6 cPCI bridge can function as a system controller or a peripheral card;
the Pi7C9X110 PCIe/PCI bridge must change the mode and handling of data
and PCI signals according to the mode of operation. The mode of operation is
selected by the signal SYSEN# (cPCI_J2 pin C2) at the cPCI backplane.
When the CM6 is a system controller the bridge is in transparent mode which
means the PCI host looks through the bridge to the backplane and initial and
enumerate all devices and peripherals throughout the system.
When the CM6 is peripheral card the bridge is in non-transparent mode which
means that it cannot configure past to the backplane.
The system/non-system mode of operation affects how the CM6 handles reset,
clocks, interrupts and request/grant signals.
System mode:
- cPCI reset (RST#) is driven (output)
12D8h
E120h
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