GE CM6 Hardware Reference Manual page 40

Single/dual core powerpc 3u compactpci sbc fourth edition
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GE Intelligent Platforms – CM6 Hardware Reference Manual, Fourth Edition
Due to the limited rear I/O pins not all 64 PMCIO signals are routed.
Table 6: P7104 connector pin assignments
Pin
01
PMCIO01*
03
PMCIO03*
05
PMCIO05*
07
PMCIO07*
09
PMCIO09*
11
PMCIO11
13
PMCIO13
15
PMCIO15
17
PMCIO17
19
PMCIO19
21
PMCIO21
23
PMCIO23
25
PMCIO25
27
PMCIO27
29
PMCIO29
31
-
33
-
35
-
37
PMCIO37*
39
PMCIO39*
41
-
43
-
45
-
47
-
49
-
51
-
53
-
55
-
57
-
59
-
61
-
63
-
* These signals are not in each
configuration available at rear cPCI_J2
connector see section below for details.
PMCIO – cPCI_J2 Configuration
Not all possible 64 PMCIO are connected to the rear cPCI_J2 connector.
Additional to this restriction some PMCIOs signals are alternative assigned
with other PMCIOs or signals. See below the signals which are connected from
the PMC connector J4 (P7104) to the cPCI_J2 connector.
Either PMCIO01...08 or GPIO 0...7 are connected to the rear and with
FlashKill option PMCIO09 is replaced with flash kill signal (FKILL#).
the table below shows the standard PMCIO – cPCI J2 configuration:
P7104 (Pn4)
Pin
PMCIO02*
02
PMCIO04*
04
PMCIO06*
06
PMCIO08*
08
PMCIO10
10
PMCIO12
12
PMCIO14
14
PMCIO16
16
PMCIO18
18
PMCIO20
20
PMCIO22
22
PMCIO24
24
PMCIO26*
26
PMCIO28
28
PMCIO30*
30
PMCIO32*
32
-
34
PMCIO36*
36
PMCIO38*
38
-
40
PMCIO42*
42
PMCIO44*
44
-
46
-
48
PMCIO50
50
PMCIO52*
52
-
54
-
56
-
58
-
60
-
62
-
64
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