GE CM6 Hardware Reference Manual page 49

GE Intelligent Platforms – CM6 Hardware Reference Manual, Fourth Edition
Status Register 0 (STAT0)
Address: Base + Offset 2
Size: 8 bit
Table 11: Status Register 0 (STAT0)
Bit Name
0 PMC_M66EN
1 CPCI_M66EN
2 SYSEN
3 HW_CFG
4 HW_WP
5 SYSCLK_SEL0
6 SYSCLK_SEL1
7 PMC_PCIXCAP
Write Read
- 0 – PMC PCI bus 33MHz
1 – PMC PCI bus 66MHz
- 0 – CPCI bus 33MHz
1 – CPCI bus 66MHz
- 0 – CM6 is peripheral (non-system) board
1 – CM6 is system board
- 0 – hardware configuration signal
HW_CFG# is open
1 – hardware configuration signal
HW_CFG# is tied to GND level
- 0 – hardware configuration signal
HW_WP# is open
1 – hardware configuration signal
HW_WP# is tied to GND level
If signal is active all write operations to
flash and nvSRAM devices are inhibited
by hardware logic.
System clock selection bit 0
System clock selection bit 1
SEL1 SEL0
0 0
0 1
1 0
1 1
0 - PMC is in conventional PCI mode
1 – reserved
Default
-
-
-
-
-
-
-
SYSCLK
166 MHz
66 MHz
100 MHz
133 MHz
-
Page 48