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ADDA
Operation:
Assembler
Syntax:
Attributes:
Description:
stores the result in the address register. The entire destination address register is
used regardless of the operation size.
Condition Codes:
Not affected
Instruction Format:
15
14
13
1
1
0
Instruction Fields:
Register field — Specifies any of the eight address registers. This is always the desti-
nation.
Opmode field — Specifies the size of the operation:
011 — Word operation. The source operand is sign-extended to a long oper-
and and the operation is performed on the address register using all 32 bits.
111 — Long operation.
Effective Address field — Specifies source operand. All addressing modes are al-
lowed as shown:
Addressing Mode
Dn
An
(An)
(An) +
– (An)
(d
, An)
16
(d
, An, Xn)
8
(bd, An, Xn)
CPU32
REFERENCE MANUAL
Add Address
Source + Destination → Destination
ADDA 〈ea〉 An
Size = (Word, Long)
Adds the source operand to the destination address register and
12
11
10
9
1
REGISTER
Mode
Register
000
Reg. number: Dn
001
Reg. number: An
010
Reg. number: An
011
Reg. number: An
100
Reg. number: An
101
Reg. number: An
110
Reg. number: An
110
Reg. number: An
INSTRUCTION SET
8
7
6
5
OPMODE
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d
, PC)
16
(d
, PC, Xn)
8
(bd, PC, Xn)
ADDA
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
Mode
Register
111
000
111
001
111
100
111
010
111
011
111
011
MOTOROLA
0
4-19
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