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7.2.1 Enabling BDM
Accidentally entering BDM in a non-development environment could lock up the
CPU32 since the serial command interface would probably not be available. For this
reason, BDM is enabled during reset via the breakpoint (BKPT) signal.
BDM operation is enabled when BKPT is asserted (low), at the rising edge of RESET.
BDM remains enabled until the next system reset. A high BKPT signal on the trailing
edge of RESET disables BDM. BKPT is relatched on each rising transition of RESET.
BKPT is synchronized internally, and must be held low for at least two clock cycles pri-
or to negation of RESET.
BDM enable logic must be designed with special care. If hold time on BKPT extends
into the first bus cycle following reset, the bus cycle could inadvertently be tagged with
a breakpoint. Refer to the system integration module user's manual for timing informa-
tion.
7.2.2 BDM Sources
When BDM is enabled, any of several sources can cause the transition from normal
mode to BDM. These sources include external breakpoint hardware, the BGND in-
struction, a double bus fault, and internal peripheral breakpoints. If BDM is not enabled
when an exception condition occurs, the exception is processed normally. Table 7-1
summarizes the processing of each source for both enabled and disabled cases. As
shown in Table 7-1, the BKPT instruction never causes a transition into BDM.
Double Bus Fault
BGND Instruction
BKPT Instruction
7.2.2.1 External BKPT Signal
Once enabled, BDM is initiated whenever assertion of BKPT is acknowledged. If BDM
is disabled, a breakpoint exception (vector $0C) is acknowledged. The BKPT input has
the same timing relationship to the data strobe trailing edge as does read cycle data.
There is no breakpoint acknowledge bus cycle when BDM is entered.
7.2.2.2 BGND Instruction
An illegal instruction, $4AFA, is reserved for use by development tools. The CPU32
defines $4AFA (BGND) to be a BDM entry point when BDM is enabled. If BDM is dis-
abled, an illegal instruction trap is acknowledged. Illegal instruction traps are dis-
cussed in 6.2.8 Illegal or Unimplemented Instructions.
MOTOROLA
7-4
Table 7-1 BDM Source Summary
Source
BDM Enabled
BKPT
Background
Background
Background
Opcode Substitution/
Illegal Instruction
DEVELOPMENT SUPPORT
BDM Disabled
Breakpoint Exception
Halted
Illegal Instruction
Opcode Substitution/
Illegal Instruction
REFERENCE MANUAL
CPU32
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