Motorola CPU32 Reference Manual page 149

MOVEM
For memory-to-register transfers, only control addressing modes or the postincre-
ment addressing mode are allowed as shown:
Addressing Mode
Dn
An
(An)
(An) +
– (An)
(d , An)
16
(d , An, Xn)
8
(bd, An, Xn)
Register List Mask field — Specifies the registers to be transferred. The low-order bit
corresponds to the first register to be transferred; the high-order bit corre-
sponds to the last register to be transferred. Thus, both for control modes and
for the postincrement mode addresses, the mask correspondence is:
15 14 13
A7 A6 A5 A4
For predecrement mode addresses, the mask correspondence is reversed:
15 14 13
D0 D1 D2 D3
An extra read bus cycle occurs for memory operands. This accesses
an operand at one address higher than the last register image re-
quired.
CPU32
REFERENCE MANUAL
Move Multiple Registers
Mode Register
— —
— —
010 Reg. number: An
011 Reg. number: An
— —
101 Reg. number: An
110 Reg. number: An
110 Reg. number: An
12 11 10 9
A3 A2 A1
12 11 10 9
D4 D5 D6
INSTRUCTION SET
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d , PC)
16
(d , PC, Xn)
8
(bd, PC, Xn)
8 7 6 5
A0 D7 D6 D5
8 7 6 5
D7 A0 A1 A2
NOTE
MOVEM
Mode Register
111 000
111 001
— —
111 010
111 011
111 011
4 3 2 1
D4 D3 D2 D1
4 3 2 1
A3 A4 A5 A6
MOTOROLA
0
D0
0
A7
4-101