Motorola CPU32 Reference Manual page 128

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ILLEGAL
Operation:
Assembler
Syntax:
Attributes:
Description:
illegal instruction bit patterns are reserved for future extension of the instruction set
and should not be used to force an exception.
Condition Codes:
Not affected
Instruction Format:
15
14
13
0
1
0
MOTOROLA
4-80
Take Illegal Instruction Trap
SSP – 2 → SSP; Vector Offset → (SSP);
SSP – 4 → SSP; PC → (SSP);
SSP – 2 → SSP; SR → (SSP);
Illegal Instruction Vector Address → PC
ILLEGAL
Unsized
Forces an illegal instruction exception, vector number 4. All other
12
11
10
9
0
1
0
1
INSTRUCTION SET
8
7
6
5
0
1
1
1
ILLEGAL
4
3
2
1
1
1
1
0
REFERENCE MANUAL
0
0
CPU32

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