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MULU
Instruction Format (long form):
15
14
13
0
1
0
0
REGISTER Dl
Instruction Fields:
Effective Address field — Specifies the source operand. Only data addressing modes
are allowed as shown:
Addressing Mode
Dn
An
(An)
(An) +
– (An)
(d
, An)
16
(d
, An, Xn)
8
(bd, An, Xn)
Register Dl field — Specifies a data register for the destination operand. The 32-bit
multiplicand comes from this register, and the low-order 32 bits of the product
are loaded into this register.
Size field — Selects a 32- or 64-bit product.
0 — 32-bit product to be returned to Register Dl.
1 — 64-bit product to be returned to Dh:Dl.
Register Dh field — If Size is 1, specifies the data register into which the high-order
32 bits of the product are loaded. If Dh = Dl and Size is 1, the results of the
operation are undefined.
MOTOROLA
4-112
Unsigned Multiply
12
11
10
9
0
1
1
0
0
SIZE
0
Mode
Register
000
Reg. number: Dn
—
—
010
Reg. number: An
011
Reg. number: An
100
Reg. number: An
101
Reg. number: An
110
Reg. number: An
110
Reg. number: An
INSTRUCTION SET
8
7
6
5
0
0
0
0
0
0
0
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d
, PC)
16
(d
, PC, Xn)
8
(bd, PC, Xn)
MULU
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
0
0
REGISTER Dh
Mode
Register
111
000
111
001
111
100
111
010
111
011
111
011
REFERENCE MANUAL
0
CPU32
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