Motorola CPU32 Reference Manual page 109

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CMPM
Operation:
Assembler
Syntax:
Attributes:
Description:
the condition codes according to the results. The destination location is not changed.
The operands are always addressed with the postincrement addressing mode, using
the address registers specified by the instruction.
Condition Codes:
X
N
Z
*
*
X
Not affected.
N
Set if the result is negative. Cleared otherwise.
Z
Set if the result is zero. Cleared otherwise.
V
Set if an overflow is generated. Cleared otherwise.
C
Set if a borrow is generated. Cleared otherwise.
Instruction Format:
15
14
13
1
0
1
Instruction Fields:
Register Ax field — (always the destination). Specifies an address register in the
postincrement addressing mode.
Size field — Specifies the size of the operation:
00 — Byte operation
01 — Word operation
10 — Long operation
Register Ay field — (always the source). Specifies an address register in the postin-
crement addressing mode.
CPU32
REFERENCE MANUAL
Compare Memory
Destination – Source → cc
CMPM (Ay)+, (Ax)+
Size = (Byte, Word, Long)
Subtracts the source operand from the destination operand and sets
V
C
*
*
12
11
10
9
1
REGISTER Ax
INSTRUCTION SET
8
7
6
5
1
SIZE
0
CMPM
4
3
2
1
0
1
REGISTER Ay
MOTOROLA
0
4-61

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