Xilinx Virtex-6 FPGA Getting Started Manual page 55

X-Ref Target - Figure 50
7.
X-Ref Target - Figure 51
8.
9.
10. Click System Status to review:
Virtex-6 FPGA Connectivity Kit Getting Started
UG664 (v1.4) July 6, 2011
All the drivers required to run the Virtex-6 FPGA Connectivity TRD are found. Click
Finish to exit the Add Hardware Wizard
Figure 50: All Virtex-6 FPGA Connectivity TRD Drivers are Installed
Launch GUI:
Double-click on the xpmon icon available on the desktop to launch the Performance
Monitor application.
Follow step 16, page 30 through
Instructions to completely verify the modified settings.
Follow step 1, page 33 through
Connectivity TRD to evaluate the performance for the modified design.
a. PCIe link status, Vendor ID, and Device ID information.
b. The vendor ID displayed on this screen should be equal to 19AA, corresponding to
the hardware change that was performed.
www.xilinx.com
Modifying the Virtex-6 FPGA Targeted Reference Design
(Figure 50).
Figure 51: Launch GUI
step 18, page 32 in
step 4, page 36 in Evaluating the Virtex-6 FPGA
UG664_80_052011
UG664_81_052011
Hardware Demonstration Setup
55