Xilinx Virtex-6 FPGA Getting Started Manual page 53

X-Ref Target - Figure 48
Virtex-6 FPGA Connectivity Kit Getting Started
UG664 (v1.4) July 6, 2011
v6_pcie_10Gdma_ddr3_xaui_axi\compiled_drivers\xrawdata, and click
Next. The Xilinx Raw Data driver is installed. Click Finish to load the next driver
(Figure 48).
Figure 48: Load Xilinx Raw Data Driver
www.xilinx.com
Modifying the Virtex-6 FPGA Targeted Reference Design
UG664_78_060911
53