Local Acceleration Logic Zclcpsch; Verifying The Settings; Completing The Test; Scheme Communication Logic For Residual Overcurrent Protection Ecpsch - ABB Relion 670 Series Commissioning Manual

1MRK 511 403-UEN E
11.10.3

Local acceleration logic ZCLCPSCH

Prepare the IED for verification of settings as outlined in section
section
The logic is checked during the secondary injection test of the impedance measuring zones.
11.10.3.1

Verifying the settings

1. Provide the IED with conditions equivalent to normal load for at least two seconds.
2. Deactivate the conditions for accelerated function.
3. Apply a phase-to-earth fault at 100% of line impedance.
4. Check that the fault is tripped with the zone 2 time delay.
5. Provide the IED with conditions equivalent to normal load for at least two seconds.
6. Activate the condition for accelerated function either by the autorecloser or by the loss-
of-load.
7. Apply a phase-to-earth fault at 100% of line impedance.
8. Check that the fault is tripped instantaneously.
11.10.3.2

Completing the test

continue to test another function or end the test by changing the
Restore connections and settings to their original values, if they were changed for testing
purposes.
11.10.4 Scheme communication logic for residual overcurrent
protection ECPSCH
Prepare the IED for verification of settings outlined in Section
settings".
Before testing the communication logic for residual overcurrent protection function ECPSCH,
the four step residual overcurrent protection function EF4PTOC has to be tested according to
the corresponding instruction. Once this is done, continue with the instructions below.
If the current reversal and weak-end infeed logic for earth-fault protection is included, proceed
with the testing according to the corresponding instruction after testing the communication
logic for residual overcurrent protection. The current reversal and weak-end-infeed functions
shall be tested together with the permissive scheme.
11.10.4.1

Testing the directional comparison logic function

Blocking scheme
1. Inject the polarizing voltage 3U0 at 5% of
the voltage by 65°.
2. Inject current (65° lagging the voltage) in one phase at about 110% of the set operating
current, and switch the current off with the switch.
3. Switch the fault current on and measure the operating time of the communication logic.
Use the TRIP signal from the configured binary output to stop the timer.
4. Compare the measured time with the set value
5. Activate the CR binary input.
6. Check that the CRL output is activated when the CR input is activated.
Bay control REC670
Commissioning manual
"Preparing for test" in this chapter.
© Copyright 2017 ABB. All rights reserved
Testing functionality by secondary injection
"Requirements"
TESTMODE setting to Off .
"Preparing the IED to verify
UBase (EF4PTOC) where the current is lagging
tCoord .
Section 11
M11758-32 v5
and
M11758-37 v5
M11758-57 v4
M13926-2 v6
M13926-7 v2
M13926-9 v6
167