Component Name>/Doc; Component Name>/Example Design - Xilinx LogiCORE IP Spartan-6 Getting Started Manual

<component name>/doc
The doc directory contains the PDF documentation provided with the core.
Table 5-3: Doc Directory
<component name>/example design
The example design directory contains the example design files provided with the core.
Table 5-4: Example Design Directory
Spartan-6 FPGA GTP Transceiver Wizard v1.8
UG546 (v1.8) December 14, 2010
Name
<project_dir>/<component_name>/doc
s6_gtpwizard_ds713.pdf
s6_gtpwizard_gsg546.pdf
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Name
<project_dir>/<component_name>/example_design
frame_check.v[hd]
frame_gen.v[hd]
gtp_attributes.ucf
<component_name>_top.ucf
<component_name>_top.v[hd]
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www.xilinx.com
Directory and File Contents
Description
Spartan-6 FPGA GTP Transceiver Wizard v1.8 Data Sheet
LogiCORE IP Spartan-6 FPGA GTP Transceiver Wizard
v1.8 Getting Started Guide
Description
Frame-check logic to be instantiated in the
example design.
Frame-generator logic to be instantiated in the
example design.
Constraints file containing the GTP attributes
generated by the GTP Wizard GUI settings.
Constraint file for mapping the GTP wrapper
example design onto a Spartan-6 device.
Top-level example design. Contains GTP
transceiver wrapper, reset logic, and
instantiations for frame generator, frame-checker,
and TX sync logic. Also contains definitions for
test frame data and ChipScope™ Pro module
instantiation. See Figure 3-1, page 15.
47