Implementing The Base Design - Xilinx KCU105 User Manual

Implementing and Simulating the Design
This chapter describes how to implement and simulate the targeted reference design. The
time required to do so can vary from system to system depending on the control computer
configuration.
All the steps mentioned in this chapter to run simulation and implementation should be run
Note:
on the control PC that has Vivado® tools installed.
In Windows, if the path length is more than 260 characters, then design implementation or
Note:
simulation using the Vivado Design Suite might fail. This is due to a Windows OS limitation. Refer to
Refer to the following AR for more details:
63175)
.

Implementing the Base Design

1. If not already done so, copy the reference design ZIP file to the desired directory on the
control PC and unzip the ZIP file. (The TRD files were extracted to your
<working_dir> in
2. Open a terminal window on a Linux system with the Vivado environment set up, or open
a Vivado tools Tcl shell on a Windows system.
3. Navigate to the kcu105_control_plane/hardware/vivado/scripts/base
folder.
4. To run the implementation flow, enter:
$ vivado -source trd01_base.tcl
This opens the Vivado Integrated Design Environment (IDE), loads the block diagram,
and adds the required top file and Xilinx design constraints (XDC) file to the project (see
Figure 4-1).
PCI Express Control Plane TRD
UG918 (v2017.2) July 18, 2017
KCU105 Evaluation Kit Master Answer Record (AR
Download the Targeted Reference Design Files, page
www.xilinx.com
Chapter 4
9.)
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