Timming; Osc Clock Frequency; Mii-Transmit Clock Tolerance - Samsung KS8910 User Manual

Preliminary Spec. ver
1.4
KS8910 100/10 Mbps ETHERNET TRANSCEIVER

TIMMING

OSC CLOCK FREQUENCY

Clk_freq
Symbol
t1 Clock Freq Dudy Cycle
t2
NOTES : 1. Clk Freq switching point is 50% if VDD

MII-TRANSMIT CLOCK TOLERANCE

Tx_clk
Symbol
t1
Tx_clk Duty Cycle
t2a Tx_clk Period (100Base-TX / MII Interface)
t2b Tx_clk Period (10Base-T / MII Interface)
NOTES : 1.TX_clk Duty Cycle switching point is 50% if VDD
Figure 8-1. Clock Frequency Timing Diagram
Table 8-6. Clock Frequency
Conditions
Clock Period
t
Figure 8-2. MII-Transmit Clock Tolerance Timing Diagram
Table 8-7. MII-Transmit Clock Tolerance
Conditions
t
1
t
2
Min
45
-
1
t
2
100M
10M
ELECTRICAL CHARACTERISTICS
Typ Max
50 55
40 -
Min Typ
35 60
35 50
- 40
- 400
Unit
%
ns
Max Unit
65
%
65
ns
-
ns
-
8-5