Preliminary Spec. ver
1.4
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
Processor
Figure 1-2. Ethernet System Overview Diagram with Emphasis on MDI
ETHERNET 10BASE-T AND 100BASE-TX BLOCK DIAGRAM
MDC
MI
Station
MDIO
MGM
Interface
4
TX
4
RX
P
C
I
10/100Mbps
B
MAC
U
S
KS8920
Registers
Control
Registers
10/20MHz
10 Base-T
25MHz/125MHz
Fast Ethernet
100 Base-TX
Figure 1-3. 100/10 Mbps Ethernet Transceiver Block Diagram
10/100Mbps
MII
PHY
KS8910
20MHz
Auto-Negotiation
Power
Status
Registers
Management
PRODUCT OVERVIEW
10Base-T
Transformer
100Base-TX
20MHz
Auto-neg
Arbitration
Driver
MLT3
Driver
10RX
100RX
+
TX
-
+
RX
-
1-3