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Preliminary Spec. ver
1.4
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
3
FUNCTIONAL BLOCKS
This section of the specification provides a description of the functional blocks of the KS8910 10/100 Mbit/s
Ethernet Transceiver architecture. The next Chapter of the document will describe the blocks in detail. Shown in
Figure 3-1 are the functional blocks in the architecture.
MDC
MI
Station
MDIO
MGM
Interface
4
TX
4
RX
MII DATA INTERFACE
The purpose of the MII data interface is to provide a simple, inexpensive, and easily implemented interconnection
between the Media Access Control (MAC) sublayer and Physical (PHY) layer devices and between PHY layer
devices and Station Management. The MII interface provides a uniform interface to the Reconciliation Sublayer for
all 100Base-T physical layer device implementation. Services required by the MII include the following:
Registers
Control
Registers
Registers
10/20MHz
10 Base-T
25MHz/125MHz
Fast Ethernet
100 Base-TX
Figure 3-1. Functional Block Diagram of KS8910
20MHz
Auto-Negotiation
Status
Power
Management
FINCTIONAL BLOCKS
20MHz
Auto-neg
Arbitration
+
Driver
TX
-
MLT3
Driver
10RX
+
100RX
RX
-
3-1
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