Samsung KS8910 User Manual page 18

100/10 mbps ethernet transceriver
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Preliminary Spec. ver
1.4
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
Signal
Pin Number
Rx_clk
50
RxD[3:0]
46,45,44,43
Rx_DV
49
Rx_er
51
MII Station Management Signals
The next sub-table shows the two MII station management signals. Use of these signals for configuring the
transceiver or negotiating a link protocol is optional.
MDC
42
MDIO
41
LED INTERFACE
These signals allow connection of LEDs to monitor the status of the Transceiver. The next sub-table shows a
summary of the LED signals generated by the Transceiver.
LEDC[D4]
3
LEDL[D3]
4
LEDT[D2]
5
Table 2-1. KS8910 Signal Descriptions
I/O
Receive clock :
O
5T
Rx_clk is a continuous clock. In 4-bit mode, its frequency is 25 MHz for
t/s
100Mbit/s operation, and 2.5 MHz for 10Mbit/s. RXD[3:0], Rx_DV, and
Rx_er are driven by the Transceiver off the falling edge of Rx_clk, and
sampled on the rising edge of Rx_clk.
O
Receive data :
5T
RxD is aligned on nibble boundaries. RxD[0] corresponds to the first bit
t/s
received on the physical medium which is the LSB of the byte in one clock
period and the fifth bit of that byte in the next clock.
O
Receive data valid :
5T
PHY asserts Rx_DV synchronously and holds it active during the clock
t/s
periods that RxD[3:0] contains valid received data. The Transceiver
asserts Rx_DV no later than the clock period when it places the first
nibble of the start frame delimiter (SFD) on RxD[3:0]. If the Transceiver
asserts Rx_DV prior to the first nibble of the SFD, then RxD[3:0] carries
valid preamble symbols.
O
Receive error :
5T
PHY asserts Rx_er synchronously whenever it detects a physical medium
t/s
error, e.g., a coding violation. The Transceiver asserts Rx_er only when it
asserts Rx_DV.
I
Management Data Clock :
5T
The timing reference for transfer of information on the MDIO signal. With
PD
the PCI clock at 33 MHz, the MDC clock has a maximum clock frequency
of 33/14 = 2.36 MHz. The minimum clock period is 424 ns.
I/O
Management Data I/O :
5T
MDIO transfers control and status management data from the attached
t/s
MAC. MDIO Transmits status information from the PHY to the MAC.
PD
Collision Indicator /Device ID4:
Pulled low for 10 ms when a collision is detected. Otherwise LEDC is high
I/O
5T
Link Integrity Indicator /Device ID3:
t/s
Pulled low during link test pass
Transmit Indicator /Device ID2:
Description
EXTERNAL SIGNALS
2-5

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