GE N60 Instruction Manual page 483

CHAPTER 5: SETTINGS
to
BIT COMP 1 ARG B0 8BIT COMP 1 ARG B7
representation of the second argument, B, of the comparator. The
significant bit, while the
8BIT COMP 1 ARG B6
the sign bit (asserted for negative values). In other words the following convention is used:
— This setting specifies whether a signed or absolute value is used for comparison with the pickup
8BIT COMP 1 INPUT MODE
threshold. This setting applies to the effective operating signal (that is, either A – B or A + B) and not to the individual inputs.
The following figure illustrates an effective operating characteristic resulting from this setting.
The actual value, as well as the
8BIT COMP 1 Out
without reference to this setting.
— This setting specifies if the element operates if the effective operating signal is above ("Over") or
8BIT COMP 1 DIRECTION
below ("Under") the threshold as illustrated in the following figure.
Figure 5-158: Operating characteristics of the eight-bit comparator
— This setting specifies if the two arguments, A and B, are added or subtracted to form the effective
8BIT COMP 1 ADD/SUB
operating signal. If the FlexLogic operand configured under this setting is logic 0 ("Off"), then the operating signal is A – B. If
the FlexLogic operand configured under this setting is logic 1 ("On"), then the operating signal is A + B. The element
switches between adding and subtracting instantly, without additional delay.
— This setting specifies the pickup threshold for the comparator. This setting applies to the value scaled
8BIT COMP 1 PICKUP
via the
8BIT COMP 1 SCALE FACTOR
— Specifies the width of hysteresis for the comparator. The following logic applies:
8BIT COMP 1 HYSTERESIS
If
8BIT COMP 1 DIRECTION
If
8BIT COMP1 DIRECTION
— Specifies a pickup time delay for the
8BIT COMP 1 PICKUP DELAY
— Specifies a reset time delay for the
8BIT COMP 1 RESET DELAY
— This setting allows re-scaling the two input arguments and the effective operating quantity.
8BIT COMP 1 SCALE FACTOR
The same scaling factor applies to all three actual values:
enables easier application, testing, and troubleshooting. Also, it facilitates telemetry applications.
— This setting specifies a FlexLogic operand for blocking the feature based on user-programmable
8BIT COMP 1 BLOCK
conditions. When the blocking input is asserted, the element resets its timers, de-asserts the
operands (if asserted), clears self-reset targets, logs a 'blocked' event if Events are enabled, and becomes
COMP1 OP
inactive. When unblocked, the element starts operating instantly. If exposed to pickup conditions for an extended period of
time and unblocked, the element picks up and starts timing out at the moment of unblocking.
N60 NETWORK STABILITY AND SYNCHROPHASOR MEASUREMENT SYSTEM – INSTRUCTION MANUAL
— These settings specify FlexLogic operands that provide an eight-bit
setting represents the most significant bit. The
8BIT COMP1 BIT0
setting.
= "Over", then Dropout :=
8BIT COMP 1 PICKUP
= "Under", then Dropout :=
8BIT COMP 1 PICKUP
8BIT COMP 1 A
setting represents the least
8BIT COMP 1 ARG B0
8BIT COMP 1 ARG B7
through FlexLogic operands, are derived
8BIT COMP1 BIT7
–
8BIT COMP 1 HYSTERESIS
+
8BIT COMP 1 HYSTERESIS
FlexLogic operand.
8BIT COMP 1 OP
FlexLogic operand.
8BIT COMP 1 OP
, and
8BIT COMP 1 B 8BIT COMP 1 Out
CONTROL ELEMENTS
setting is
Eq. 5-33
. The scaling
and
8BIT COMP 1 PKP 8BIT
5-289
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