External Memory Expansion Port (Port A) - Motorola DSP56305 User Manual

Signal
Type
Name
PINIT/ Input
NMI
2.6

EXTERNAL MEMORY EXPANSION PORT (PORT A)

Table 2-6, External Address Bus Signals, Table 2-7, External Data Bus Signals, and
Table 2-8, External Bus Control Signals on the following pages detail the signals relevant
to Port A, the external memory expansion port.
When the DSP56305 enters a low-power standby mode (Stop or Wait), it releases bus
mastership and tri-states the relevant Port A signals: A0–A17, D0–D23,
AA0/RAS0–AA3/RAS3, RD, WR, BS, CAS, BCLK, and BCLK.
If hardware refresh of external DRAM is enabled, Port A exits the Wait mode to allow
the refresh to occur and then returns to the Wait mode.
MOTOROLA
Table 2-5 Phase Lock Loop Signals (Continued)
State During
Reset
Input PLL Initial/Non-Maskable Interrupt—During
assertion of RESET, PINIT/NMI is configured as
PINIT and its value is written into the PLL Enable
(PEN) bit of the PLL control register, determining
whether the PLL is enabled or disabled.
After RESET deassertion and during normal
instruction processing, PINIT/NMI is configured as
NMI, which is a Schmitt-trigger input and
negative-edge-triggered Non-Maskable Interrupt
(NMI) request internally synchronized to CLKOUT.
PINIT/NMI can tolerate 5 V.
DSP56305 User's Manual
Signal/Connection Descriptions
External Memory Expansion Port (Port A)
Signal Description
2-9