Motorola DSP56362 User Manual

MOTOROLA
SEMICONDUCTOR PRODUCT INFORMATION
Product Brief
24-BIT AUDIO DIGITAL SIGNAL PROCESSOR
The DSP56362 is a high performance DSP optimized for cost-sensative consumer audio
applications. A general purpose DSP56362 is available as well as a multimode, multichannel audio
decoder for consumer applications such as Audio/Video (A/V) receivers, surround sound decoders,
Digital Versatile Disk (DVD) players, digital TV, and other audio applications. The DSP56362
supports all of the popular multichannel audio decoding formats, including Dolby Digital Surround,
Moving Picture Experts Group Standard 2 (MPEG2), and Digital Theater Systems (DTS), in a single
device with sufficient MIPS resources for customer defined post-processing features such as bass
management, 3D virtual surround, Lucasfilm THX5.1, soundfield processing, and advanced
equalization.
The DSP56362, Figure 1,is member of the 56300 Motorola Symphony™ DSP Family. The
DSP56362 utilizes the single-instruction-per-clock-cycle DSP56300 core, while retaining code
compatibility with the DSP56000 core family. The DSP56362 contains audio-specific peripherals and
an on-board software architecture as shown in Figure 2 and is offered in a 100/120 MHz/MIPS
version at a nominal 3.3 V.
Triple
Timer
Address
Generation
Unit
Six Channel
DMA Unit
Internal
Data
Bus
Switch
EXTAL
Clock
Generator
PLL
CLKOUT
RESET
PINIT/NMI
This document contains information on a new product. Specifications and information herein are subject to change without notice.
©1999 MOTOROLA, INC.
Freescale Semiconductor, Inc.
2 16 12
DAX Host
ESAI
(SPDIF) Interface
Peripheral
Expansion Area
24-BIT
DSP56300
Core
Program Program
Interrupt Decode
Controller Controller
MODA/IRQA
MODB/IRQB
MODC/IRQC
MODD/IRQD
Figure 1 DSP56362 Block Diagram
DSP56362 Product Brief
For More Information On This Product,
Go to: www.freescale.com
5
Program RAM/
X Data
Instruction
SHI
RAM
Cache
5632 24
3072 24
ROM
Program ROM
6144 24
30K 24
Bootstrap ROM
YAB
XAB
PAB
DAB
DDB
YDB
XDB
PDB
GDB
Data ALU
Program
24 24 + 56
Address
Two 56-bit Accumulators
Generator
56-bit Barrel Shifter
Order this document by:
DSP56362P/D
REV. 2
DSP56362
Y Data
RAM
Memory
5632 24
Expansion
ROM
Area
6144 24
18
External
Address
Bus
Address
Switch
DRAM/SRAM
Bus
11
Interface
&
Control
I - Cache
Control
External
24
Data Bus
Switch
Data
Power
Mgmt.
6
56-bit MAC
JTAG
™
OnCE
AA0456G