Once Memory Address Latch (Omal); Once Memory Limit Register 0 (Omlr0); Once Memory Address Comparator 0 (Omac0); Once Memory Limit Register 1 (Omlr1) - Motorola DSP56305 User Manual

Address comparators are useful in determining where a program may be getting lost or
when data is being written where it should not be written. They are also useful in halting
a program at a specific point to examine/change registers or memory. Using address
comparators to set breakpoints enables the user to set breakpoints in RAM or ROM and
while in any operating mode. Memory accesses are monitored according to the contents
of the OBCR as specified in OnCE Breakpoint Control Register (OBCR) on page 10-12.
10.5.1

OnCE Memory Address Latch (OMAL)

The OnCE Memory Address Latch (OMAL) is a 16-bit register that latches the PAB, XAB
or YAB on every instruction cycle according to the MBS1–MBS0 bits in OBCR.
10.5.2

OnCE Memory Limit Register 0 (OMLR0)

The OnCE Memory Limit Register 0 (OMLR0) is a 16-bit register that stores the memory
breakpoint limit. Before enabling breakpoints, OMLR0 must be loaded by the external
command controller. OMLR0 can be read or written through the JTAG port.
10.5.3

OnCE Memory Address Comparator 0 (OMAC0)

The OnCE Memory Address Comparator 0 (OMAC0) compares the current memory
address (stored in OMAL0) with the OMLR0 contents.
10.5.4

OnCE Memory Limit Register 1 (OMLR1)

The OnCE Memory Limit Register 1 (OMLR1) is a 16-bit register that stores the memory
breakpoint limit. OMLR1 can be read or written through the JTAG TAP. Before enabling
breakpoints, OMLR1 must be loaded by the external command controller.
10.5.5

OnCE Memory Address Comparator 1 (OMAC1)

The OnCE Memory Address Comparator 1 (OMAC1) compares the current memory
address (stored in OMAL0) with the OMLR1 contents.
MOTOROLA DSP56305 User's Manual
On-Chip Emulation Module
OnCE Memory Breakpoint Logic
10-11