Timer Programming Model - Motorola DSP56305 User Manual

24-bit digital signal processor
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9.3.1
Timer Block Diagram
GDB
24
TCSR
Control/Status
Register
9
Timer Control
Logic
TIO
CLK/2
Prescaler CLK
9.3.2

Timer Programming Model

The timer programming model consists of a 24-bit counter, a 24-bit read/write Timer
Control and Status Register (TCSR), a 24-bit write-only Timer Load Register (TLR), a
24-bit read/write Timer Compare Register (TCPR), and a 24-bit read-only Timer Count
Register (TCR). The timers are functionally identical. Figure 9-6 shows the timer
programming model.
MOTOROLA
24
24
TLR
Load
Register
24
2
Counter
Figure 9-5 Timer Block Diagram
DSP56305 User's Manual
24
TCR
Count
Register
24
24
Timer Interrupt/
DMA Request
Timer/Event Counter
Timer Architecture
24
TCPR
Compare
Register
24
=
AA0676
9-9

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