Yamaha CL3 Service Manual page 317

Q P O N
■ CPU 002 CIRCUIT DIAGRAM (CL3/CL1)
CLOCK BUFFER
CPU
28CC1-2001087662-2
1
M L K J
CPLD
not installed
I H G F
I2C-BUS
CONTROLLER
not installed
not installed
not installed
FLASH ROM
not installed
not installed
E D C B A
not installed
MRAM
IC204 : MRAM
1M
(Magneto resistive Random Access Memory)
512M
CPLD (Bus Control), MEMORY, E-BUS HOST
■ CPU 002 CIRCUIT DIAGRAM (CL3/CL1)
CL3/CL1
1
2
3
4
5
6
7
8
9
10
11
12
19