Hitachi H8S/2646 Hardware Manual page 732

A18–A0
CE CE
OE OE
WE
I/O7–I/O0
Note: Data is latched on the rising edge of WE.
Figure 20-18 Timing Waveforms for Memory Read after Memory Write
Table 20-13 AC Characteristics in Transition from Memory Read Mode to Another Mode
(Conditions: V
Item
Command write cycle
CE hold time
CE setup time
Data hold time
Data setup time
Write pulse width
WE rise time
WE fall time
700
Command write
t
t
ces
ceh
t
wep
t t
f r
t t
ds dh
= 5.0 V ±0.5 V, V
CC
Symbol
t
nxtc
t
ceh
t
ces
t
dh
t
ds
t
wep
t
r
t
f
Memory read mode
Address stable
t
nxtc
= 0 V, T = 25°C ±5°C)
SS a
Min Max
20 —
0 —
0 —
50 —
50 —
70 —
— 30
— 30
Unit
µs
ns
ns
ns
ns
ns
ns
ns