Section 17 Motor Control Pwm Timer; Overview; Features - Hitachi H8S/2646 Hardware Manual

Section 17 Motor Control PWM Timer

17.1

Overview

The H8S/2646 Series has an on-chip motor control PWM (pulse width modulator) with a
maximum capability of 16 pulse outputs.
17.1.1

Features

Features of the motor control PWM are given below.
• Maximum of 16 pulse outputs
 Two 10-bit PWM channels, each with eight outputs.
 Each channel is provided with a 10-bit counter (PWCNT) and cycle register (PWCYR).
 Duty and output polarity can be set for each output.
• Buffered duty registers
 Duty registers (PWDTR) are provided with buffer registers (PWBFR), with data transferred
automatically every cycle.
 Channel 1 has four duty registers and four buffer registers.
 Channel 2 has eight duty registers and four buffer registers.
• 0% to 100% duty
 A duty cycle of 0% to 100% can be set by means of a duty register setting.
• Five operating clocks
 There is a choice of five operating clocks (ø, ø/2, ø/4, ø/8, ø/16).
• On-chip output driver
• High-speed access via internal 16-bit-bus
 High-speed access is possible via a 16-bit bus interface.
• Two interrupt sources
 An interrupt can be requested independently for each channel by a cycle register compare
match.
• Automatic transfer of register data
 Block transfer and one-word data transfer are possible by activating the data transfer
controller (DTC).
611