Timing Of On-Chip Supporting Modules - Hitachi H8S/2646 Hardware Manual

23.4.4

Timing of On-Chip Supporting Modules

Table 23-7 lists the timing of on-chip supporting modules.
Table 23-7 Timing of On-Chip Supporting Modules
Condition : V = PWMV
CC
V = 4.5 V to AV
ref
+75°C (regular specifications), T
Item
I/O port Output data
delay time
Input data
setup time
Input data
hold time
PPG Pulse output
delay time
TPU Timer output
delay time
Timer input
setup time
Timer clock
input setup
time
Timer clock
pulse width
PWM Pulse output
delay time
= 4.5 V to 5.5 V, LPV
CC
, V = PWMV
CC SS
Symbol
t
F
t
PRS
t
PRH
t
POD
t
TOCD
t
TICD
t
TCKS
Single edge t
TCKWH
Both edges t
TCKWL
t
MPWMOD
= 4.5 V to 5.5 V, AV
CC
= PLLV = AV
SS SS
= –40°C to +85°C (wide-range specifications)
a
Condition
Min Max Unit
— 50 ns
30 —
30 —
— 50 ns
— 50 ns
30 —
30 — ns
1.5 — t
cyc
2.5 —
— 50 ns
= 4.5 V to 5.5 V,
CC
= 0 V, T = –20°C to
SS a
Test Conditions
Figure 23-12
Figure 23-13
Figure 23-14
Figure 23-15
Figure 23-16
771