Bit
7
—
Initial value
1
Read/Write
—
Bus Operation Interrupt Mask
0
1
6
5
—
—
1
1
—
—
Unread Interrupt Mask
0
Unread message overwrite interrupt request to CPU by IRR9 enabled
1
Unread message overwrite interrupt request to CPU by IRR9 disabled
Bus operation interrupt request to CPU by IRR12 enabled
Bus operation interrupt request to CPU by IRR12 disabled
4
3
IMR12
—
1
1
R/W
—
Mailbox Empty Interrupt Mask
0
Mailbox empty interrupt request to CPU by IRR8 enabled
1
Mailbox empty interrupt request to CPU by IRR8 disabled
2
1
0
—
IMR9
IMR8
1
1
1
—
R/W
R/W
889