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TIOR2—Timer I/O Control Register 2
Bit
7
IOB3
Initial value
0
Read/Write
R/W
TGR2B I/O Control
0
0
0
0
TGR2B is
output
1
compare
1
0
register
1
1
0
0
1
1
0
1
TGR2B is
1
*
0
0
input
1
capture
1
*
register
6
5
IOB2
IOB1
0
0
R/W
R/W
TGR2A I/O Control
0
0
0
0
TGR2A is
output
1
compare
1
0
register
1
1
0
0
1
1
0
1
TGR2A is
1
0
0
*
input
1
capture
1
*
register
Output disabled
Initial output is 0
0 output at compare match
output
1 output at compare match
Toggle output at compare match
Output disabled
Initial output is 1
0 output at compare match
output
1 output at compare match
Toggle output at compare match
Capture input
Input capture at rising edge
source is
Input capture at falling edge
TIOCB2 pin
Input capture at both edges
H'FF32
4
3
IOB0
IOA3
IOA2
0
0
R/W
R/W
R/W
Output disabled
Initial output is 0
0 output at compare match
output
1 output at compare match
Toggle output at compare match
Output disabled
Initial output is 1
0 output at compare match
output
1 output at compare match
Toggle output at compare match
Capture input
Input capture at rising edge
source is
Input capture at falling edge
TIOCA2 pin
Input capture at both edges
*: Don't care
2
1
0
IOA1
IOA0
0
0
0
R/W
R/W
*: Don't care
TPU2
1025
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