Motorola CPU32 Reference Manual page 97

M68300 series central processor unit
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III
BCLR
Operation:
Assembler
Syntax:
Attributes:
Test a Bit and Clear
(bit number) of Destination)
~
Z;
o
~
(bit number) of Destination
BCLR On, (ea)
BCLR #(data), (ea)
Size
=
(Byte, Long)
BCLR
Description:
Tests a specified bit in the destination operand, sets the Z condition code
appropriately, then clears the bit. When a data register is the destination, any of the 32 bits can
be specified by a modulo 32 bit number. When a memory location is the destination, the operation
is a byte operation, and the bit number is modulo 8. In al\ cases, bit zero refers to the least
significant bit. The bit number for this operation can be specified in either of two ways:
1. Immediate - The bit number is specified by a second instruction word.
2. Register - The specified data register contains the bit number.
Condition Codes:
X
N
X Not affected
N Not affected
z
v
C
Z Set if the bit tested is zero. Cleared otherwise
V Not affected
C Not affected
Instruction Format (Bit Number Static, specified as immediate data):
15
14
13
12
11
10
9
8
7
6
5
4
3
2
EFFECTIVE ADDRESS
0
0
0
0
1
0
0
0
1
0
I
MODE
REGISTER
0
0
0
0
0
0
0
0
BIT NUMBER
o
MOTOROLA
4-44
INSTRUCTION SET
CPU32 REFERENCE MANUAL

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