Motorola CPU32 Reference Manual page 288

If the TR bit is set in the stacked SSW, create a six-word stack frame.
and execute the trace handler. If either B1 or BO in the SSW is set, create
another six word stack frame and execute the hardware breakpoint handler.
De-allocate the stack and return control to the faulted program.
6.3.2.5 (Type III) Correcting Faults By Conversion and Restart
In some situations it may be necessary to rerun all the operand transfers for a
faulted instruction rather than continue from a faulted operand. Clearing the MV
bit in the stacked SSW converts a type III fault into a type II fault. Consequently,
MOVEM, like all other type II exceptions, will be restarted upon return from the
exception handler. When a fault occurs after an operand has transferred, that
transfer is not "undone". However, these memory locations are accessed a
second time when the instruction is restarted. If a register used in an effective
address calculation is overwritten before a fault occurs, an incorrect effective
address is calculated upon instruction restart.
6.3.2.6 (Type III) Correcting Faults via RTE
The preferred method of MOVEM bus fault recovery is to correct the cause of the
fault and then execute an RTE instruction without altering the stack contents.
The RTE recognizes that MOVEM was in progress when a fault occurred,
restores the appropriate machine state, refetches the instruction, repeats the
faulted transfer, and continues the instruction.
MOVEM is the only instruction continued upon return from an exception
handler. Although the instruction is refetched, the effective address is not
~
recalculated, and the mask is rescanned the same number of times as before - - -
the fault - modifying the code prior to RTE can cause unexpected results.
6.3.2.7 (Type IV) Correcting Faults via Software
BERR exceptions can occur during exception processing while the processor is
fetching an exception vector or while it is stacking. The same stack frame and
SSW are used in both cases, but each has a distinct fault address. The stacked
faulted exception format/vector word identifies the type of faulted exception and
the contents of the remainder of the frame. A fault address corresponding to the
vector specified in the stacked format/vector word indicates that the processor
could not obtain the address of the exception handler.
CPU32 REFERENCE MANUAL
EXCEPTION PROCESSING MOTOROLA
6-25