Motorola CPU32 Reference Manual page 241

M68300 series central processor unit
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III
eSR
15
14
13
12
11
10
9
8
7
6
5
4
3
2
o
I
1
I
1
I
o
I
0
I
o
I
0
I
1
I
8-BIT DISPLACEMENT
16-BIT DISPLACEMENT IF 8-BIT DISPLACEMENT
=
$00
32-BIT DISPLACEMENT IF 8-BIT DISPLACEMENT
=
$FF
MOVEQ
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
REGISTER
o
1
DATA
Data Field: Data is sign extended to a long operand, and all 32 bits are transferred to the data register.
OR
15
14
13
12
11
10
9
1
1
0
0
REGISTER
Opmode Field:
DIVU
DIVS
seeD
Byte
000
100
Word
001
101
15
14
13
12
11
10
1
0
0
0
REGISTER
15
14
13
12
11
10
1
0
0
0
REGISTER
9
9
8
7
OPMODE
Long
010
110
8
0
8
1
7
1
7
1
6
5
4
3
2
EFFECTIVE ADDRESS
MODE
Operation
(ea»)
+
(Dn»)
~
Dn
(Dn»)
+
(ea»)
~
ea
6
5
4
3
I
REGISTER
2
EFFECTIVE ADDRESS
1
I
MODE
REGISTER
6
5
4
3
2
EFFECTIVE ADDRESS
1
I
MODE
REGISTER
o
o
o
o
o
15
14
13
12
11
10
9
8
7 6 5 4 3
2
0
o
1
REGISTER Ry
o l o l o l o l R i M I
REGISTERRx
RIM Field: 0
=
Data Register to Data Register 1
=
Memory to Memory
If RIM
=
0, both registers must be data registers
If RIM
=
1, both registers must be address registers for Predecrement Addressing mode
MOTOROLA
4-188
INSTRUCTION SET
CPU32 REFERENCE MANUAL

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