Motorola M68000 User Manual
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Motorola M68000 User Manual

Motorola M68000 User Manual

8-/16-/32-bit microprocessors
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µ MOTOROLA
Microprocessors User's Manual
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different
applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not
convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems
intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola
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registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
©MOTOROLA INC., 1993
Freescale Semiconductor, Inc.
M68000
8-/16-/32-Bit
Ninth Edition
For More Information On This Product,
Go to: www.freescale.com
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  • Page 1 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages.

  • Page 2: Table Of Contents

    Interrupt Control ..................3-6 System Control.................... 3-7 M6800 Peripheral Control ................3-8 Processor Function Codes ................3-8 Clock ......................3-9 3.10 Power Supply ....................3-9 3.11 Signal Summary ..................3-10 MOTOROLA M68000 USER’S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 3 Privilege Mode Changes ................6-2 6.1.4 Reference Classification................6-3 Exception Processing................... 6-4 6.2.1 Exception Vectors ..................6-4 6.2.2 Kinds Of Exceptions ................. 6-5 6.2.3 Multiple Exceptions................... 6-8 viii M68000 USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 4 JMP, JSR, LEA, PEA, and MOVEM Instruction Execution Times....7-8 7.10 Multiprecision Instruction Execution Times ..........7-8 7.11 Miscellaneous Instruction Execution Times ..........7-9 7.12 Exception Processing Instruction Execution Times ........7-10 MOTOROLA M68000 USER’S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 5 CMOS Considerations ................10-4 10.5 AC Electrical Specifications Definitions............. 10-5 10.6 MC68000/68008/68010 DC Electrical Characteristics ......10-7 10.7 DC Electrical Characteristics ..............10-8 10.8 AC Electrical Specifications—Clock Timing ..........10-8 M68000 USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 6 Pin Assignments..................11-1 11.2 Package Dimensions ................11-7 Appendix A MC68010 Loop Mode Operation Appendix B M6800 Peripheral Interface Data Transfer Operation................B-1 Interrupt Interface Operation ..............B-4 MOTOROLA M68000 USER’S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 7 Breakpoint Acknowledge Cycle Timing Diagram ..........5-11 5-13 3-Wire Bus Arbitration Flowchart (NA to 48-Pin MC68008 and MC68EC000 ............5-12 5-14 2-Wire Bus Arbitration Cycle Flowchart ............. 5-13 M68000 USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 8 Clock Input Timing Diagram ................10-9 10-4 Read Cycle Timing Diagram ................10-13 10-5 Write Cycle Timing Diagram................10-14 10-6 MC68000 to M6800 Peripheral Timing Diagram (Best Case) ......10-16 MOTOROLA M68000 USER’S MANUAL xiii For More Information On This Product, Go to: www.freescale.com...
  • Page 9 Example External VMA Circuit ................B-2 External VMA Timing ..................B-2 M6800 Peripheral Timing—Best Case..............B-3 M6800 Peripheral Timing—Worst Case ............. B-3 Autovector Operation Timing Diagram..............B-5 M68000 USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 10: List Of Tables

    Exception Processing Instruction Execution Times ........... 7-11 Effective Address Calculation Times..............8-2 Move Byte Instruction Execution Times ............... 8-2 Move Word Instruction Execution Times.............. 8-3 Move Long Instruction Execution Times .............. 8-3 MOTOROLA M68000 USER’S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 11 ( J C = J A ) ......................10-4 10-2 Power Dissipation and Junction Temperature vs Temperature ( J C = J C ) ......................10-4 MC68010 Loop Mode Instructions ..............A-3 M68000 USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 12: Section 1 Overview

    This manual includes hardware details and programming information for the MC68000, the MC68HC000, the MC68HC001, the MC68008, the MC68010, and the MC68EC000. For ease of reading, the name M68000 MPUs will be used when referring to all processors. Refer to M68000PM/AD, M68000 Programmer's Reference Manual , for detailed information on the MC68000 instruction set.
  • Page 13 The MC68000 has a 16-bit data bus and 24-bit address bus while the full architecture provides for 32-bit address and data buses. It is completely code-compatible with the MC68008 8-bit data bus implementation of the M68000 and is upward code compatible with the MC68010 virtual extensions and the MC68020 32-bit implementation of the architecture.

  • Page 14: Mc68Hc000

    8- or 16-bit data bus operation. The MC68HC001 is object-code compatible with the MC68HC000, and code written for the MC68HC001 can be migrated without modification to any member of the M68000 Family. MC68EC000 The MC68EC000 is an economical high-performance embedded controller designed to suit the needs of the cost-sensitive embedded controller market.

  • Page 15: Introduction

    2.1.1 User' Programmer's Model The user programmer's model (see Figure 2-1) is common to all M68000 MPUs. The user programmer's model, contains 16, 32-bit, general-purpose registers (D0–D7, A0–...

  • Page 16: Supervisor Programmer's Model

    2.1.2 Supervisor Programmer's Model The supervisor programmer's model consists of supplementary registers used in the supervisor mode. The M68000 MPUs contain identical supervisor mode register resources, which are shown in Figure 2-2, including the status register (high-order byte) and the supervisor stack pointer (SSP/A7').

  • Page 17: Status Register

    The five basic data types supported are as follows: 1. Bits 2. Binary-Coded-Decimal (BCD) Digits (4 Bits) 3. Bytes (8 Bits) 4. Words (16 Bits) 5. Long Words (32 Bits) MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 18 The register indirect addressing modes provide postincrementing, predecrementing, offsetting, and indexing capabilities. The program counter relative mode also supports indexing and offsetting. For detail information on addressing modes refer to M68000PM/AD, M68000 Programmer Reference Manual . M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 19: Data Organization In Registers

    16 bits, and long-word operands, the entire 32 bits. The least significant bit is addressed as bit zero; the most significant bit is addressed as bit 31. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL For More Information On This Product, Go to: www.freescale.com...

  • Page 20: Address Registers

    BYTE FFFFFE Figure 2-5. Word Organization in Memory The data types supported by the M68000 MPUs are bit data, integer data of 8, 16, and 32 bits, 32-bit addresses, and binary-coded-decimal data. Each data type is stored in memory as shown in Figure 2-6. The numbers indicate the order of accessing the data from the processor.
  • Page 21 BCD 3 BCD 4 BCD 5 BCD 6 BCD 7 MSD = MOST SIGNIFICANT DIGIT LSD = LEAST SIGNIFICANT DIGIT Figure 2-6. Data Organization in Memory MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL For More Information On This Product, Go to: www.freescale.com...

  • Page 22: Instruction Set Summary

    Figure 2-7. Memory Data Organization of the MC68008 INSTRUCTION SET SUMMARY Table 2-2 provides an alphabetized listing of the M68000 instruction set listed by opcode, operation, and syntax. In the syntax descriptions, the left operand is the source operand, and the right operand is the destination operand. The following list contains the notations used in Table 2-2.
  • Page 23 > — Relational test, true if source operand is greater than destination operand V — Logical OR — Logical exclusive OR — Logical AND MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL For More Information On This Product, Go to: www.freescale.com...
  • Page 24 If the condition is false and else is omitted, the instruction performs no operation. Refer to the Bcc instruction description as an example. 2-10 M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 25 CMPI # <data>,<ea> CMPM Destination—Source CMPM (Ay)+, (Ax)+ DBcc If condition false then (Dn – 1 DBcc Dn,<label> If Dn –1 then PC + d MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL 2-11 For More Information On This Product, Go to: www.freescale.com...
  • Page 26 MOVE SR,<ea> If supervisor state then SR Destination else TRAP (MC68010 only) MOVE to SR If supervisor state MOVE <ea>,SR then Source else TRAP 2-12 M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 27 Destination Rotated with X by <count> Destination ROXd 1 # <data>,Dy ROXR ROXd 1 <ea> (SP) PC; SP + 4 + d RTD #<displacement> MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL 2-13 For More Information On This Product, Go to: www.freescale.com...
  • Page 28 If V then TRAP TRAPV Destination Tested Condition Codes TST <ea> UNLK SP; (SP) An; SP + 4 UNLK An NOTE: d is direction, L or R. 2-14 M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 29: Signal Description

    CONTROL BGACK CONTROL IPL0 BERR SYSTEM INTERRUPT RESET IPL1 CONTROL CONTROL HALT IPL2 Figure 3-1. Input and Output Signals (MC68000, MC68HC000 and MC68010) MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 3- 1 For More Information On This Product, Go to: www.freescale.com...

  • Page 30: Address Bus

    CONTROL STATUS MC68EC000 DTACK ARBITRATION CONTROL IPL0 BERR RESET IPL1 SYSTEM INTERRUPT CONTROL HALT IPL2 CONTROL AVEC MODE Figure 3-3. Input and Output Signals (MC68EC000) M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 31 A1, A2, and A3 provide the level number of the interrupt being acknowledged, and address lines A23–A4 are driven to logic high. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 3- 3 For More Information On This Product, Go to: www.freescale.com...

  • Page 32: Data Bus

    R/W line is high, the processor reads from the data bus. When the R/W line is low, the processor drives the data bus. In 8-bit mode, UDS is always forced high and the LDS signal is used. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...

  • Page 33: Bus Arbitration Control

    In the 48-pin version of the MC68008 and MC68EC000, no pin is available for the bus grant acknowledge signal; this microprocessor uses a two-wire bus arbitration scheme. All M68000 processors can use two-wire bus arbitration.

  • Page 34: Interrupt Control

    0, 2, 5, and 7. In all other respects, the interrupt priority levels in this version of the MC68008 are identical to those levels in the other microprocessors described in this manual. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 35: System Control

    This input should be changed only at reset and must be stable two clocks after RESET is negated. Changing this input during normal operation may produce unpredictable results. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 3- 7 For More Information On This Product, Go to: www.freescale.com...

  • Page 36: M6800 Peripheral Control

    Freescale Semiconductor, Inc. 3.7 M6800 PERIPHERAL CONTROL These control signals are used to interface the asynchronous M68000 processors with the synchronous M6800 peripheral devices. These signals are described in the following paragraphs. Enable (E) This signal is the standard enable signal common to all M6800 Family peripheral devices.

  • Page 37: Clock

    Power is supplied to the processor using these connections. The positive output of the power supply is connected to the V pins and ground is connected to the GND pins. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 3- 9 For More Information On This Product, Go to: www.freescale.com...

  • Page 38: Signal Summary

    Function Code Output FC0, FC1, Output High Clock Input High Power Input V CC Input — — — Ground Input — — — *Open drain. 3-10 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 39: 8-Bit Bus Operations

    The address bus in 8-bit operation includes A0, which selects the appropriate byte for each read cycle. Figure 4-1 and 4-2 illustrate the byte read-cycle operation. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 4- 1 For More Information On This Product, Go to: www.freescale.com...
  • Page 40 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 w w w w S5 S6 S7 FC2–FC0 A23–A0 (DS) DTACK D7–D0 READ WRITE 2 WAIT STATE READ Figure 4-2. Read and Write-Cycle Timing Diagram M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 41: Write Cycle

    The 8-bit operation performs two write cycles for a word write operation, issuing the data strobe signal during each cycle. The address bus includes the A0 bit to select the desired byte. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 4- 3 For More Information On This Product, Go to: www.freescale.com...
  • Page 42 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 FC2–FC0 A23–A0 DTACK D7–D0 EVEN BYTE WRITE ODD BYTE WRITE ODD BYTE WRITE Figure 4-4. Write-Cycle Timing Diagram M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 43: Read-Modify-Write Cycle

    Thus, all read-modify-write cycles are byte operations. Figure 4-5 and 4-6 illustrate the read-modify-write cycle operation. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 4- 5 For More Information On This Product, Go to: www.freescale.com...
  • Page 44 2) NEGATE AS 3) REMOVE DATA FROM D7–D0 4) SET R/W TO READ TERMINATE THE CYCLE 1) NEGATE DTACK START NEXT CYCLE Figure 4-5. Read-Modify-Write Cycle Flowchart M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 45 DTACK or BERR at this time. STATES 8–11 The bus signals are unaltered during S8–S11, during which the arithmetic logic unit makes appropriate modifications to the data. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 4- 7 For More Information On This Product, Go to: www.freescale.com...

  • Page 46: Other Bus Operations

    — Bus Request — Bus Grant — Bus Acknowledgment • Bus Control • Bus Errors and Halt Operations • Reset Operations • Asynchronous Operations • Synchronous Operations M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 47: 16-Bit Bus Operations

    Figure 5-2. The read and write cycle timing is shown in Figure 5-3 and the word and byte read-cycle timing diagram is shown in Figure 5-4. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 1 For More Information On This Product,...
  • Page 48 2) NEGATE UDS AND LDS 3) NEGATE AS TERMINATE THE CYCLE 1) REMOVE DATA FROM D7–D0 OR D15–D8 2) NEGATE DTACK START NEXT CYCLE Figure 5-2. Byte Read-Cycle Flowchart M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 49 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 FC2–FC0 A23–A1 A0 * DTACK D15–D8 D7–D0 READ WRITE READ *Internal Signal Only Figure 5-4. Word and Byte Read-Cycle Timing Diagram MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 3 For More Information On This Product, Go to: www.freescale.com...

  • Page 50: Write Cycle

    A0 bit to determine which byte to write and issues the appropriate data strobe. When the A0 bit equals zero, UDS is asserted; when the A0 bit equals one, LDS is asserted. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...
  • Page 51 3) REMOVE DATA FROM D7-D0 OR D15-D8 4) SET R/W TO READ TERMINATE THE CYCLE 1) NEGATE DTACK START NEXT CYCLE Figure 5-6. Byte Write-Cycle Flowchart MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 5 For More Information On This Product, Go to: www.freescale.com...
  • Page 52 DTACK or BERR is asserted. STATE 5 During S5, no bus signals are altered. STATE 6 During S6, no bus signals are altered. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 53: Read-Modify-Write Cycle

    3) REMOVE DATA FROM D7–D0 OR D15–D8 TERMINATE THE CYCLE 4) SET R/W TO READ 1) NEGATE DTACK START NEXT CYCLE Figure 5-8. Read-Modify-Write Cycle Flowchart MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 7 For More Information On This Product, Go to: www.freescale.com...
  • Page 54 DTACK or BERR at this time. STATES 8–11 The bus signals are unaltered during S8–S11, during which the arithmetic logic unit makes appropriate modifications to the data. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 55: Cpu Space Cycle

    CPU space cycle, the breakpoint acknowledge cycle, in which A16–A19 are all low. Other configurations of A16–A19 are reserved by Motorola to define other types of CPU cycles used in other M68000 Family microprocessors. Figure 5-10 shows the encoding of CPU space addresses.
  • Page 56 Although a vector number is one byte, both data strobes are asserted due to the microcode used for exception processing. The processor does not recognize anything on data lines D8 through D15 at this time. Figure 5-11. Interrupt Acknowledge Cycle Timing Diagram 5-10 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 57: Bus Arbitration

    2-wire bus arbitration. Bus arbitration on all microprocessors, except the 48-pin MC68008 and MC68EC000, BGACK must be pulled high for 2-wire bus arbitration. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 11 For More Information On This Product, Go to: www.freescale.com...
  • Page 58 RELEASE BUS MASTERSHIP 1) NEGATE BGACK REARBITRATE OR RESUME PROCESSOR OPERATION Figure 5-13. 3-Wire Bus Arbitration Cycle Flowchart (Not Applicable to 48-Pin MC68008 or MC68EC000) 5-12 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 59 DTACK D15–D0 BGACK PROCESSOR DMA DEVICE PROCESSOR DMA DEVICE Figure 5-15. 3-Wire Bus Arbitration Timing Diagram (Not Applicable to 48-Pin MC68008 or MC68EC000) MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 13 For More Information On This Product, Go to: www.freescale.com...

  • Page 60: Requesting The Bus

    The bus grant acknowledge signal on all the processors except the 48-pin MC68008 and MC68EC000 helps to prevent the bus arbitration circuitry from responding to noise on the 5-14 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...

  • Page 61: Receiving The Bus Grant

    Section 10 Electrical Characteristic) has been met. The input asynchronous signal is sampled on the falling edge of the clock and is valid internally after the next falling edge. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 15 For More Information On This Product,...
  • Page 62 (S0), the special sequence shown in Figure 5-21 applies. Instead of being asserted on the next rising edge of clock, BG is delayed until the second rising edge following its internal assertion. 5-16 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 63 Figures 5-19, 5-20, and 5-21 applies to all processors using 3-wire bus arbitration. Figures 5-22, 5-23, and 5-24 applies to all processors using 2-wire bus arbitration. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 17 For More Information On This Product,...
  • Page 64 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 BGACK FC2–FC0 A23–A1 DTACK D15–D0 PROCESSOR ALTERNATE BUS MASTER PROCESSOR Figure 5-19. 3-Wire Bus Arbitration Timing Diagram—Processor Active 5-18 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 65 S0 S1 S2 S3 S4 BGACK FC2–FC0 A23–A1 DTACK D15–D0 PROCESSOR INACTIVE ALTERNATE BUS MASTER PROCESSOR Figure 5-20. 3-Wire Bus Arbitration Timing Diagram—Bus Inactive MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 19 For More Information On This Product, Go to: www.freescale.com...
  • Page 66 BGACK SAMPLED BR ASSERTED BGACK NEGATED BGACK FC2–FC0 A23–A1 DTACK D15–D0 PROCESSOR ALTERNATE BUS MASTER PROCESSOR Figure 5-21. 3-Wire Bus Arbitration Timing Diagram—Special Case 5-20 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 67 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 BGACK FC2–FC0 A23–A1 DTACK D15–D0 ALTERNATE BUS MASTER PROCESSOR PROCESSOR Figure 5-22. 2-Wire Bus Arbitration Timing Diagram—Processor Active MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 21 For More Information On This Product, Go to: www.freescale.com...
  • Page 68 S0 S1 S2 S3 S4 BGACK FC2–FC0 A23–A1 DTACK D15–D0 ALTERNATE BUS MASTER PROCESSOR PROCESSOR INACTIVE Figure 5-23. 2-Wire Bus Arbitration Timing Diagram—Bus Inactive 5-22 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 69: Bus Error And Halt Operation

    In a bus architecture that requires a handshake from an external device, such as the asynchronous bus used in the M68000 Family, the handshake may not always occur. A bus error input is provided to terminate a bus cycle in error when the expected signal is not asserted.

  • Page 70: Bus Error Operation

    FC2–FC0 A23–A1 LDS/UDS DTACK D15–D0 BERR HALT INITIATE INITIATE BUS RESPONSE BUS ERROR READ FAILURE DETECTION ERROR STACKING Figure 5-25. Bus Error Timing Diagram 5-24 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 71 2 (offset $08) and placed in the program counter. The processor resumes execution at the address in the vector, which is the first instruction in the bus error handler routine. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 25 For More Information On This Product, Go to: www.freescale.com...

  • Page 72: Retrying The Bus Cycle

    HALT is asserted by an external device. Figure 5-28 shows the timing of the delayed operation. FC2-FC0 A23–A1 LDS/UDS DTACK D15–D0 BERR 1 CLOCK PERIOD HALT READ HALT RETRY Figure 5-27. Retry Bus Cycle Timing Diagram 5-26 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 73: Halt Operation

    MC68000. When HALT is asserted by an external device, the processor halts and remains halted as long as the signal remains asserted, as shown in Figure 5-29. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 27 For More Information On This Product,...

  • Page 74: Double Bus Fault

    A retry operation does not initiate exception processing; a bus error during a retry operation does not cause a double bus fault. The processor can continue to retry a bus cycle indefinitely if external hardware requests. 5-28 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 75: Reset Operation

    10 clock cycles or longer resets the processor. However, an external reset signal that is asserted while the processor is MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 29 For More Information On This Product,...

  • Page 76: The Relationship Of Dtack, Berr, And Halt

    HALT are asserted following DTACK (case 6). BERR is negated coincident with or after DTACK. HALT must be held at least one cycle after BERR. Table 5-1 shows the details of the resulting bus cycle termination in the M68000 microprocessors for various combinations of signal sequences. 5-30...
  • Page 77 3. For an MC68010, return DTACK before data verification. If data is invalid, assert BERR and HALT to retry the error cycle (case 6). MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 31 For More Information On This Product, Go to: www.freescale.com...

  • Page 78: Asynchronous Operation

    Figure 5-32 shows a fully asynchronous write cycle. ADDR UDS/LDS DATA DTACK Figure 5-31. Fully Asynchronous Read Cycle 5-32 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 79 AS to the assertion of DTACK. During this unlimited time, the processor inserts wait cycles in one-clock-period increments until DTACK is recognized. Figure 5-33 shows the important timing parameters for a pseudo-asynchronous read cycle. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 33 For More Information On This Product, Go to: www.freescale.com...
  • Page 80 Figure 5-34 shows the important timing specifications for a pseudo-asynchronous write cycle. 5-34 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 81: Synchronous Operation

    The standard M68000 bus cycle consists of four clock periods (eight bus cycle states) and, optionally, an integral number of clock cycles inserted as wait states. Wait states are inserted as required to allow sufficient response time for the external device.
  • Page 82 DS is specified by parameter #29. For a write cycle, only AS and UDS, LDS, and/or DS are negated; timing parameter #12 also applies. 5-36 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 83 The timing for a synchronous read cycle, including relevant timing parameters, is shown in Figure 5-36. CLOCK ADDR UDS/LDS DTACK DATA Figure 5-35. Synchronous Read Cycle MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 37 For More Information On This Product, Go to: www.freescale.com...
  • Page 84 Metastable signals propagating through synchronous machines can produce unpredictable operation. Figure 5-37 is a conceptual representation of the input synchronizers used by the M68000 Family processors. The input latches allow the input to propagate through to the output when E is high.
  • Page 85 DTACK is recognized. Violating this requirement may cause the MC68010 to operate erratically. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 5- 39 For More Information On This Product, Go to: www.freescale.com...

  • Page 86: Exception Processing

    The mode is also used to choose between the supervisor stack pointer (SSP) and the user stack pointer (USP) in instruction references. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 6- 1 For More Information On This Product, Go to: www.freescale.com...

  • Page 87: Supervisor Mode

    During exception processing, the current state of the S bit of the status register is saved, and the S bit is set, putting the processor in the M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...

  • Page 88: Reference Classification

    (Undefined, Reserved)* Supervisor Data Supervisor Program CPU Space *Address space 3 is reserved for user definition, while 0 and 4 are reserved for future use by Motorola. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 6- 3 For More Information On This Product,...

  • Page 89: Exception Processing

    EVEN BYTE (A0=0) EVEN BYTE (A0=0) WORD 0 NEW PROGRAM COUNTER (HIGH) A1=0 WORD 1 NEW PROGRAM COUNTER (LOW) A1=1 Figure 6-1. Exception Vector Format M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 90: Kinds Of Exceptions

    The actual address on the address bus is truncated to the number of address bits available on the bus of the particular implementation of the M68000 architecture. In all processors except the MC68008, this is 24 address bits. (A0 is implicitly encoded in the data strobes.) In the MC68008, the address is 20 or 22 bits in length.
  • Page 91 In addition, illegal instructions, word fetches from odd addresses, and privilege violations cause exceptions. Tracing is similar to a very high priority, internally generated interrupt following each instruction. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...
  • Page 92 — NOTES: Vector numbers 12, 13, 16–23, and 48–63 are reserved for future enhancements by Motorola. No user peripheral devices should be assigned these numbers. Reset vector (0) requires four words, unlike the other vectors which only require two words, and is located in the supervisor program space.

  • Page 93: Multiple Exceptions

    This rule does not apply to the reset exception; its handler is executed first even though it has the highest priority, because the reset operation clears all other exceptions. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...

  • Page 94: Exception Stack Frames

    Table 6-4 lists the MC68010 format codes. Although some formats are specific to a particular M68000 Family processor, the format 0000 is always legal and indicates that just the first four words of the frame are present.
  • Page 95 (MC68000, MC68HC000, MC68HC001, MC68EC000, and MC68008) HIGHER ADDRESS STATUS REGISTER PROGRAM COUNTER HIGH PROGRAM COUNTER LOW FORMAT VECTOR OFFSET OTHER INFORMATION DEPENDING ON EXCEPTION Figure 6-6. MC68010 Stack Frame 6-10 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 96: Exception Processing Sequence

    Any processing in progress at the time of the reset is aborted and cannot be recovered. The processor is forced into the supervisor state, and the trace state is forced off. The MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 6- 11 For More Information On This Product,...

  • Page 97: Interrupts

    The processor then proceeds with the usual exception processing, saving the format/offset word (MC68010 only), program counter, and status 6-12 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 98: Uninitialized Interrupt

    6.3.3 Uninitialized Interrupt An interrupting device provides an M68000 interrupt vector number and asserts data transfer acknowledge (DTACK), or asserts valid peripheral address (VPA), or auto vector (AVEC), or bus error (BERR) during an interrupt acknowledge cycle by the MC68000.

  • Page 99: Illegal And Unimplemented Instructions

    Illegal instruction is the term used to refer to any of the word bit patterns that do not match the bit pattern of the first word of a legal M68000 instruction. If such an instruction is fetched, an illegal instruction exception occurs. Motorola reserves the right to define instructions using the opcodes of any of the illegal instructions.

  • Page 100: Privilege Violations

    6.3.8 Tracing To aid in program development, the M68000 Family includes a facility to allow tracing following each instruction. When tracing is enabled, an exception is forced after each instruction is executed. Thus, a debugging program can monitor the execution of the program under test.

  • Page 101: Bus Error

    This halt simplifies the detection of a catastrophic system failure, since the processor removes itself from the system to 6-16 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...

  • Page 102: Bus Error (Mc68010)

    RTE instruction to continue the instruction that caused the error. Figure 6-8 shows the order of the stacked information. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 6- 17 For More Information On This Product, Go to: www.freescale.com...
  • Page 103 NOTE: The stack pointer is decremented by 29 words, although only 26 words of information are actually written to memory. The three additional words are reserved for future use by Motorola. Figure 6-8. Exception Stack Order (Bus and Address Error)

  • Page 104: Address Error

    Read/write flag; 0=write, 1=read FC — The function code used during the faulted access — These bits are reserved for future use by Motorola and will be zero when written by the MC68010. Figure 6-9. Special Status Word Format 6.3.10 Address Error An address error exception occurs when the processor attempts to access a word or long- word operand or an instruction at an odd address.

  • Page 105: Return From Exception (Mc68010)

    MC68010 enters the halted state. 6-20 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 106: Operand Effective Address Calculation Times

    The total number of clock periods, the number of read cycles, and the number of write cycles (zero for all effective address calculations) are shown in the previously described format. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 7- 1 For More Information On This Product, Go to: www.freescale.com...

  • Page 107: Move Instruction Execution Times

    (d 8 , PC, Xn)* 22(5/0) #<data> 16(4/0) 16(4/0) 20(4/1) 20(4/1) 20(4/1) 28(6/1) 30(6/1) 28(6/1) 36(8/1) *The size of the index register (Xn) does not affect execution time. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 108: Standard Instruction Execution Times

    (+). MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 7- 3 For More Information On This Product, Go to: www.freescale.com...

  • Page 109: Immediate Instruction Execution Times

    The total number of clock periods, the number of read cycles, and the number of write cycles are M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...

  • Page 110: Single Operand Instruction Execution Times

    (+). MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 7- 5 For More Information On This Product, Go to: www.freescale.com...

  • Page 111: Shift/Rotate Instruction Execution Times

    Byte 10+2n (2/0) — Word 10+2n (2/0) 16(2/2)+ Long 12+n2 (2/0) — +Add effective address calculation time for word operands. n is the shift count. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 112: Bit Manipulation Instruction Execution Times

    68(8/6)+* 14(2/0) TRAP — 62(8/6) — TRAPV — 66(10/6) 8(2/0) +Add effective address calculation time for word operand. * Indicates maximum base value. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 7- 7 For More Information On This Product, Go to: www.freescale.com...

  • Page 113: Jmp, Jsr, Lea, Pea, And Movem Instruction Execution Times

    The following notation applies in Table 7-12: Dn — Data register operand M — Memory operand M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 114: Miscellaneous Instruction Execution Times

    (+). MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 7- 9 For More Information On This Product, Go to: www.freescale.com...
  • Page 115 The total number of clock periods, the number of read cycles, and the number of write cycles are shown in the previously described format. The number of clock 7-10 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...
  • Page 116 + Add effective address calculation time. ** Indicates the time from when RESET and HALT are first sampled as negated to when instruction execution starts. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 7- 11 For More Information On This Product, Go to: www.freescale.com...

  • Page 117: Operand Effective Address Calculation Times

    The total number of clock periods, the number of read cycles, and the number of write cycles (zero for all effective address calculations) are shown in the previously described format. MOTOROLA MC68000 8-/16-/32-MICROPROCESSORS USER’S MANUAL 8- 1 For More Information On This Product, Go to: www.freescale.com...

  • Page 118: Move Instruction Execution Times

    (d 8 , PC, Xn)* 14(3/0) #<data> 8(2/0) 8(2/0) 12(2/1) 12(2/1) 12(2/1) 16(3/1) 18(3/1) 16(3/1) 20(4/1) *The size of the index register (Xn) does not affect execution time. MC68000 8-/16-/32-MICROPROCESSORS UISER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 119: Standard Instruction Execution Times

    An — Address register operand Dn — Data register operand ea — An operand specified by an effective address — Memory effective address operand MOTOROLA MC68000 8-/16-/32-MICROPROCESSORS USER’S MANUAL 8- 3 For More Information On This Product, Go to: www.freescale.com...

  • Page 120: Immediate Instruction Execution Times

    (+). In Table 8-5, the following notation applies: — Immediate operand Dn — Data register operand An — Address register operand — Memory operand MC68000 8-/16-/32-MICROPROCESSORS UISER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 121: Single Operand Instruction Execution Times

    The number of clock periods, the number of read cycles, and the number of write cycles, respectively, must be added to those of the effective address calculation where indicated by a plus sign (+). MOTOROLA MC68000 8-/16-/32-MICROPROCESSORS USER’S MANUAL 8- 5 For More Information On This Product, Go to: www.freescale.com...

  • Page 122: Shift/Rotate Instruction Execution Times

    8+2n (1/0) — ROXR, ROXL Byte, Word 6+2n (1/0) 8(1/1)+ Long 8+2n (1/0) — +Add effective address calculation time for word operands. n is the shift count. MC68000 8-/16-/32-MICROPROCESSORS UISER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 123: Bit Manipulation Instruction Execution Times

    Byte 18(2/2) — Word 18(2/2) — DBcc cc true — 12(2/0) cc false, Count Not Expired 10(2/0) — cc false, Counter Expired — 14(3/0) MOTOROLA MC68000 8-/16-/32-MICROPROCESSORS USER’S MANUAL 8- 7 For More Information On This Product, Go to: www.freescale.com...

  • Page 124: Jmp, Jsr, Lea, Pea, And Movem Instruction Execution Times

    The following notation applies in Table 8-11: Dn — Data register operand M — Memory operand MC68000 8-/16-/32-MICROPROCESSORS UISER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 125: Miscellaneous Instruction Execution Times

    The number of clock periods, the number of read cycles, and the number of write cycles, respectively, must be added to those of the effective address calculation where indicated by a plus sign (+). MOTOROLA MC68000 8-/16-/32-MICROPROCESSORS USER’S MANUAL 8- 9 For More Information On This Product, Go to: www.freescale.com...
  • Page 126 Table 8-14 lists the timing data for exception processing. The numbers of clock periods include the times for all stacking, the vector fetch, and the fetch of the first instruction of 8-10 MC68000 8-/16-/32-MICROPROCESSORS UISER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 127 * The interrupt acknowledge cycle is assumed to take four clock periods. ** Indicates the time from when RESET and HALT are first sampled as negated to when instruction execution starts. MOTOROLA MC68000 8-/16-/32-MICROPROCESSORS USER’S MANUAL 8- 11 For More Information On This Product,...
  • Page 128 NOTE The total number of clock periods (n) includes instruction fetch and all applicable operand fetches and stores. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 9- 1 For More Information On This Product, Go to: www.freescale.com...

  • Page 129: Operand Effective Address Calculation Times

    The totals include instruction fetch, operand reads, and operand writes. The total number of clock periods, the number of read cycles, and the number of write cycles are shown in the previously described format. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...
  • Page 130 20(3/1) (An)+ 14(1/1) 14(1/1) 16(1/1) 20(3/1) 20(3/1) 22(3/1) 18(3/1) 18(3/1) 20(3/1) –(An) 16(1/1) 16(1/1) 18(1/1) 22(3/1) 22(3/1) 24(3/1) 20(3/1) 20(3/1) 22(3/1) *Word only. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 9- 3 For More Information On This Product, Go to: www.freescale.com...

  • Page 131: Standard Instruction Execution Times

    In Tables 9-6 and 9-7, the following notation applies: An — Address register operand Sn — Data register operand ea — An operand specified by an effective address — Memory effective address operand M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 132 *Word or long word only. <ea> may be (An), (An)+, or –(An) only. Add two clock periods to the table value if <ea> is –(An). MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 9- 5 For More Information On This Product, Go to: www.freescale.com...

  • Page 133: Immediate Instruction Execution Times

    The number of clock periods, the number of read cycles, and the number of write cycles, respectively, must be added to those of the effective address calculation where indicated by a plus sign (+). M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...
  • Page 134 16(3/1) Long 6(1/0) — 12(1/2) 12(1/2) 14(1/2) 16(2/2) 20(2/2) 16(2/2) 20(3/2) *The size of the index register (Xn) does not affect execution time. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 9- 7 For More Information On This Product, Go to: www.freescale.com...

  • Page 135: Shift/Rotate Instruction Execution Times

    ROXR, ROXL Byte, Word 6+2n (1/0) 8(1/1)+ Long 8+2n (1/0) — +Add effective address calculation time. n is the shift or rotate count. * Word only. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 136: Bit Manipulation Instruction Execution Times

    Table 9-15 lists the timing data for the conditional instructions. The total number of clock periods, the number of read cycles, and the number of write cycles are shown in the previously described format. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 9- 9 For More Information On This Product, Go to: www.freescale.com...

  • Page 137: Jmp, Jsr, Lea, Pea, And Movem Instruction Execution Times

    Table 9-17 lists the timing data for multiprecision instructions. The numbers of clock periods include the times to fetch both operands, perform the operations, store the results, 9-10 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product,...

  • Page 138: Miscellaneous Instruction Execution Times

    (+). MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 9- 11 For More Information On This Product, Go to: www.freescale.com...
  • Page 139 +Use nonfetching effective address calculation time. **Source or destination is a memory location for the MOVEP instruction and a control register for the MOVEC instruction. 9-12 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 140 ** Indicates maximum value. *** Indicates the time from when RESET and HALT are first sampled as negated to when instruction execution starts. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL 9- 13 For More Information On This Product, Go to: www.freescale.com...

  • Page 141: Electrical And Thermal Characteristics

    10.2 THERMAL CHARACTERISTICS Characteristic Symbol Value Symbol Value Rating Thermal Resistance Ceramic, Type L/LC Ceramic, Type R/RC Plastic, Type P Plastic, Type FN *Estimated MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-1 For More Information On This Product, Go to: www.freescale.com...

  • Page 142: Power Considerations

    J A approximately equals ; J C . Substitution of J C for J A in equation 1 results in a lower semiconductor junction temperature. 10-2 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 143 - 40 AMBIENT TEMPERATURE (T ), C Figure 10-1. MC68000 Power Dissipation (P D ) vs Ambient Temperature (T A ) (Not Applicable to MC68HC000/68HC001/68EC000) MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-3 For More Information On This Product, Go to: www.freescale.com...

  • Page 144: Cmos Considerations

    Does not apply to the MC68HC000, MC68HC001, and MC68EC000. Values for thermal resistance presented in this manual, unless estimated, were derived using the procedure described in Motorola Reliability Report 7843 “Thermal Resistance Measurement Method for MC68XXX Microcomponent Devices”’ and are provided for design purposes only.

  • Page 145: Ac Electrical Specifications Definitions

    The measurement of the AC specifications is defined by the waveforms shown in Figure 10-2. To test the parameters guaranteed by Motorola, inputs must be driven to the voltage levels specified in the figure. Outputs are specified with minimum and/or maximum limits, as appropriate, and are measured as shown.
  • Page 146 E. Mode select setup time to RESET negated. F. Mode select hold time from RESET negated. Figure 10-2. Drive Levels and Test Points for AC Specifications 10-6 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 147: Mc68000/68008/68010 Dc Electrical Characteristics

    *With external pullup resistor of 1.1 . **Capacitance is periodically sampled rather than 100% tested. ***During normal operation, instantaneous V CC current requirements may be as high as 1.5 A. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-7 For More Information On This Product, Go to: www.freescale.com...

  • Page 148: Dc Electrical Characteristics

    MHz MC68000 and are valid only for product bearing date codes of 8827 and later. **This frequency applies only to MC68HC000 and MC68EC000 parts. 10-8 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 149: Mc68008 Ac Electrical Specifications-Clock Timing

    0.8 V and 2.0 V. Figure 10-3. Clock Input Timing Diagram MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-9 For More Information On This Product, Go to: www.freescale.com...

  • Page 150: Ac Electrical Specifications-Read And Write Cycles

    Clock Low to Data-Out Valid — — — — — — (Write) AS, DS) Negated to Data-Out — — — — — — Invalid (Write) 10-10 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 151 E Low to Control, Address — — — — — — Bus Invalid (Address Hold Time) BGACK Width Low — — — — — — MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-11 For More Information On This Product, Go to: www.freescale.com...
  • Page 152 E. 10. 245 ns for the MC68008. 11. 50 ns for the MC68008 12. 50 ns for the MC68008. 10-12 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 153 0.8 V and 2.0 V. Figure 10-4. Read Cycle Timing Diagram (A pplies To A ll P rocessors E xcept The MC68EC 000) MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-13 For More Information On This Product, Go to: www.freescale.com...
  • Page 154 2. Because of loading variations, R/W may be valid after AS even though both are initiated by the rising edge of S2 (specification #20A). Figure 10-5. Write Cycle Timing Diagram (Applies To A ll Processors E xcept The MC68EC 000) 10-14 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 155: Ac Electrical Specifications-Mc68000 To M6800 Peripheral

    #49 indicates the absolute maximum skew that will occur between the rising edge of the strobes and the falling edge of the E clock. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-15 For More Information On This Product, Go to: www.freescale.com...
  • Page 156 NOTE: This timing diagram is included for those who wish to design their own circuit to generate VMA. It shows the best case possible attainable Figure 10-6. MC68000 to M6800 Peripheral Timing Diagram (Best Case) (Applies To A ll Processors E xcept The MC68EC 000) 10-16 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 157: Ac Electrical Specifications-Bus Arbitration

    4. The processor will negate BG and begin driving the bus again if external arbitration logic negates BR before asserting BGACK. 5. The minimum value must be met to guarantee proper operation. If the maximum value is exceeded, BG may be reasserted. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-17 For More Information On This Product, Go to: www.freescale.com...
  • Page 158 Figure 10-7. Bus Arbitration Timing (Applies To A ll Processors E xcept The MC68EC 000) 10-18 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 159 NOTES: Waveform measurements for all inputs and outputs are specified at: logic high 2.0 V, logic low = 0.8 V. 1. MC68008 52-Pin Version only. Figure 10-8. Bus Arbitration Timing (A pplies To A ll P rocessors E xcept The MC68EC 000) MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-19 For More Information On This Product, Go to: www.freescale.com...
  • Page 160 1. MC68008 52-Pin Version only. Figure 10-9. Bus Arbitration Timing — Idle Bus Case (Applies To A ll Processors E xcept The MC68EC 000) 10-20 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 161 1 MC68008 52-Pin Version Only. Figure 10-10. Bus Arbitration Timing — Active Bus Case (A pplies To A ll P rocessors E xcept The MC68EC 000) MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-21 For More Information On This Product, Go to: www.freescale.com...
  • Page 162 1. MC68008 52-Pin Version only. Figure 10-11. Bus Arbitration Timing — Multiple Bus Request (Applies To A ll Processors E xcept The MC68EC 000) 10-22 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 163: Mc68Ec000 Dc Electrical Specifications

    C in — 20.0 Load Capacitance — HALT All Others — Currents listed are with no loading. Capacitance is periodically sampled rather than 100% tested. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-23 For More Information On This Product, Go to: www.freescale.com...

  • Page 164: Mc68Ec000 Ac Electrical Specifications-Read And Write

    — — — — — Time on Read) 28 2 AS , DS Negated to DTACK Negated (Asynchronous Hold) Clock High to DTACK Negated 10-24 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 165 7. The minimum value must be met to guarantee proper operation. If the maximum value is exceeded, BG may be reasserted. 8. DS is used in this specification to indicate UDS and LDS . MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-25 For More Information On This Product, Go to: www.freescale.com...
  • Page 166 The voltage swing through this range should start outside and pass through the range such that the rise or fall is linear between 0.8 V and 2.0 V. Figure 10-12. MC68EC000 Read Cycle Timing Diagram 10-26 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 167 2. Because of loading variations, R/W may be valid after AS even though both are initiated by the rising edge of S2 (specification #20A). Figure 10-13. MC68EC000 Write Cycle Timing Diagram MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-27 For More Information On This Product, Go to: www.freescale.com...

  • Page 168: Mc68Ec000 Ac Electrical Specifications-Bus Arbitration

    NOTES: 1.The minimum value must be met to guarantee proper operation. If the maximum value is exceeded, BG may be reasserted. 2.DS is used in this specification to indicate UDS and LDS . 10-28 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 169 NOTES: Waveform measurements for all inputs and outputs are specified at: logic high 2.0 V, logic low = 0.8 V. Figure 10-14. MC68EC000 Bus Arbitration Timing Diagram MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 10-29 For More Information On This Product,...

  • Page 170: Ordering Information And Mechanical Data

    Package 68000 68008 68010 68HC000 68HC001 68EC000 64-Pin Dual-In-Line 68-Terminal Pin Grid Array 64-Lead Quad Pack 68-Lead Quad Flat Pack 52-Lead Quad 48-Pin Dual-In-Line MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 11-1 For More Information On This Product, Go to: www.freescale.com...
  • Page 171 Freescale Semiconductor, Inc. DTACK BGACK MC68000 MC68010 MC68HC000 HALT RESET BERR IPL2 IPL1 IPL0 Figure 11-1. 64-Pin Dual In Line 11-2 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 172 BERR IPL0 IPL2 IPL1 IPL2 IPL1 HALT RESET (BOTTOM VIEW) (BOTTOM VIEW) HALT RESET BGACK BGACK DTACK DTACK Figure 11-2. 68-Lead Pin Grid Array MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 11-3 For More Information On This Product, Go to: www.freescale.com...
  • Page 173 MC68000/MC68HC000/MC68010 HALT RESET BERR IPL2 IPL1 DTACK BGACK MC68EC000 MODE HALT RESET AVEC BERR IPL2 IPL1 Figure 11-3. 68-Lead Quad Pack (1 of 2) 11-4 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 174 BERR IPL2 IPL1 Figure 11-3. 68-Lead Quad Pack (2 of 2) IPL2 IPL1 BERR RESET MC68008 HALT BGACK DTACK Figure 11-4. 52-Lead Quad Pack MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 11-5 For More Information On This Product, Go to: www.freescale.com...
  • Page 175 Freescale Semiconductor, Inc. IPL2/IPL0 IPL1 BERR MC68008 RESET HALT DTACK Figure 11-5. 48-Pin Dual In Line 11-6 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 176: Package Dimensions

    746-01 LC Suffix 754-01 R and P Suffix 765A-05 RC Suffix 778-02 FN Suffix 779-02 FN Suffix 779-01 FN Suffix 847-01 FC Suffix 840B-01 FU Suffix MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 11-7 For More Information On This Product, Go to: www.freescale.com...
  • Page 177 ANSI Y14.5m, 1982. 0.204 0.330 0.008 0.013 2.54 4.19 0.100 0.165 15.24 BSC 0.600 BSC 1.016 1.524 0.040 0.060 Figure 11-7. Case 740-03—L Suffix 11-8 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 178 0.600 BSC PARALLEL. 5. DIMENSIONING AND TOLERANCING PER ANSI Y14.5, 1982. 6. CONTROLLING DIMENSION: INCH. 0.51 1.02 0.020 0.040 Figure 11-8. Case 767-02—P Suffix MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 11-9 For More Information On This Product, Go to: www.freescale.com...
  • Page 179 ANSI Y14.5, 1973. 0.008 0.013 0.20 0.33 0.100 0.165 2.54 4.19 22.61 23.11 0.910 0.890 1.02 1.52 0.040 0.060 Figure 11-9. Case 746-01—LC Suffix 11-10 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...
  • Page 180 0.20 0.38 0.008 0.015 3.05 3.55 0.120 0.140 22.86 BSC 0.9 00 BSC 0.51 1.02 0.020 0.040 Figure 11-10. Case 754-01—R and P Suffix MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL 11-11 For More Information On This Product, Go to: www.freescale.com...
  • Page 181 Freescale Semiconductor, Inc. Figure 11-11. Case 765A-05—RC Suffix 11-12 M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL MOTOROLA For More Information On This Product, Go to: www.freescale.com...

  • Page 182: Mc68010 Loop Mode Operation

    The last two instructions, a MOVE and a test equal, decrement, and branch (DBEQ), form the loop that moves the block of data. The bus activity required to execute these instructions consists of the following cycles: MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL A- 1 For More Information On This Product, Go to: www.freescale.com...
  • Page 183 Table A-1 lists the loop mode instructions of the MC68010. Only one-word versions of these instructions can operate in the loop mode. One-word instructions use the three address register indirect modes: (An), (An)+, and –(An). M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL MOTOROLA For More Information On This Product,...
  • Page 184 LSR [W] ROL [W] ROR [W] ROXL [W] ROXR NOTE: [B, W, or L] indicate an operand size of byte, word, or long word. MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL A- 3 For More Information On This Product, Go to: www.freescale.com...

This manual is also suitable for:

Mc68hc000Mc68hc001Mc68008Mc68010Mc68ec000

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