Hardware Reset Values; S3C8275X/C8278X/C8274X Set 1 Register And Values After Reset - Samsung S3C8275X User Manual

RESET
and POWER-DOWN

HARDWARE RESET VALUES

Table 8-1, 8-2, 8-3 list the reset values for CPU and system registers, peripheral control registers, and peripheral
data registers following a reset operation. The following notation is used to represent reset values:
•
A "1" or a "0" shows the reset bit value as logic one or logic zero, respectively.
•
An "x" means that the bit value is undefined after a reset.
•
A dash ("–") means that the bit is either not used or not mapped, but read 0 is the bit value.
Table 8-1. S3C8275X/C8278X/C8274X Set 1 Register and Values After RESET
Register Name
Basic timer control register
System clock control register
System flags register
Register pointer 0
Register pointer 1
Stack pointer (high byte)
Stack pointer (low byte)
Instruction pointer (high byte)
Instruction pointer (low byte)
Interrupt request register
Interrupt mask register
System mode register
Register page pointer
8-2
Mnemonic Address
Dec
Locations D0H – D2H are not mapped.
BTCON 211
CLKCON 212
FLAGS 213
RP0 214
RP1 215
SPH 216
SPL 217
IPH 218
IPL 219
IRQ 220
IMR 221
SYM 222
PP 223
S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
Bit Values After RESET
Hex 7 6 5
D3H 0 0 0
− −
D4H 0
D5H x x x
D6H 1 1 0
D7H 1 1 0
D8H x x x
D9H x x x
DAH x x x
DBH x x x
DCH 0 0 0
DDH x x x
− −
DEH 0
DFH 0 0 0
4 3 2 1 0
0 0 0 0 0
− − −
0 0
x x x 0 0
− − −
0 0
− − −
0 1
x x x x x
x x x x x
x x x x x
x x x x x
0 0 0 0 0
x x x x x
x x x 0 0
0 0 0 0 0