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CONTROL REGISTERS
LCON
— LCD Control Register
Bit Identifier
Reset Value
Read/Write
Addressing Mode
.7
.6–.5
.4–.2
.1
.0
4-20
.7
.6
0
0
R/W
R/W
Register addressing mode only
Internal LCD Dividing Resistors Enable Bit
0
Enable internal LCD dividing resistors
1
Disable internal LCD dividing resistors
LCD Clock Selection Bits
9
0
0
fw/2
(64 Hz)
8
0
1
fw/2
(128 Hz)
7
1
0
fw/2
(256 Hz)
6
1
1
fw/2
(512 Hz)
LCD Duty and Bias Selection Bits
0
0
0
1/4duty, 1/3bias
0
0
1
1/3duty, 1/3bias
0
1
0
1/3duty, 1/2bias
0
1
1
1/2duty, 1/2bias
1
x
x
Static
NOTES:
1.
"x" means don't care.
2.
When 1/2 bias is selected, the bias levels are set as V
Not used for the S3C8275X/C8278X/C8274X
LCD Display Control Bit
0
Turn display off (Turn off the P-Tr)
1
Turn display on (Turn on the P-Tr)
S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
.5
.4
0
0
R/W
R/W
R/W
E0H
Set 1, Bank 1
.3
.2
.1
0
0
–
R/W
–
, V
(V
), and V
LC0
LC1
LC2
.0
0
R/W
.
SS
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